Adrian E. Ong

Programmable memory repair scheme

Integrated circuit testing module configured for set-up and hold time testing

Integrated circuit testing module including signal shaping interface

Testing and Recovery in a Multilayer Device

Shared memory bus architecture for system with processor and memory units

Delay lock loop delay adjusting method and apparatus

Memory device including multiplexed inputs

Testing fuse configurations in semiconductor devices

Processor-memory unit for use in system-in-package and system-in-module devices

Controller to detect malfunctioning address of memory device