Ahila Krishnamoorthy

Electromigration behavior of dual-damascene Cu interconnects––Structure, width, and length dependences

Abstract Experiments were performed to study the effect of line width and length, and the results revealed interesting differences in electromigration behavior of via-fed upper and lower layer dual-damascene test structures. The observed location of electromigration induced void in upper and lower layer test structures cannot be completely explained by the theory of current gradient induced vacancy diffusion. The electromigration median time to failure (MTF) were found to be dependent upon the line width for the lower layer test structures while it remained unaffected in the case of upper layer test structure. Cu/dielectric cap interface acting as the dominant electromigration path and the current crowding location being near the Cu/dielectric cap interface for lower layer structures due to structural differences, explain this behavior. Similarly, short length upper and lower layer test structures exhibited completely different characteristics. The back stress effect on short lines was evident on both upper and lower layer structures, however, only the upper layer showed two distinct via and line failure mechanisms. These observed effects are specific to Cu dual-damascene structures and can have major technological implications for electromigration reliability assessment.

Characterization of line-edge roughness (LER) propagation from resists: underlayer interfaces in ultrathin resist films

Line edge roughness evolutions in EUV resist patterns are investigated. Three dimensional scanning electron microscopy images show the pattern sidewall roughness to be highly anisotropic and the roughness to be propagating from the resistsubstrate interface up the resist pattern sidewall. In ultrathin resist films, (film thickness ca. 100 nm and below) roughness is found to be fully correlated from the resist-substrate interface to the resist-air interface. This behavior is seen regardless of the resist platforms being used. Underlayer stack roughness contributions to the pattern sidewall roughness leading to resist LER were examined and no correlations between the two were found. At the same time, the chemical properties of the underlayer stacks are shown to have strong influences on the resist roughness and process performance. Exact mechanisms behind this are not clearly understood at present.

A direct measurement of electromigration induced drift velocity in Cu dual damascene interconnects

A dual damascene structure with an additional 25 nm Ta diffusion barrier embedded into the upper Cu layer was fabricated to measure the drift velocity of electromigration. The embedded diffusion barrier layer successfully confined void growth into a long and regular shape between the SiN layer and embedded Ta layer. Edge depletion was observed to initiate from the cathode end and elongate into a long and regular shape due to the confinement of the intermediate Ta diffusion barrier layer. With this test structure, electromigration induced drift displacement can be accurately measured with a linear dependence on time. Measurement was conducted at a series of temperatures to obtain the Cu/capping interface diffusion controlled activation energy.

65.2: Spin-On Polymers for TFT Gate Dielectric Application and Planarization of Stainless Steel

We present spin-on polymer films with significantly improved dielectric properties for TFT gate dielectric applications. Breakdown voltage//leakage current//CV hysteresis are 4.10 MV/cm at 1 μA/cm2//4.9 × 10−8 A/cm2 at 2.5 MV/cm//3.4 V and 4.73 MV/cm//2.6 × 10−8 A/cm2//0.44V at curing temperatures of 250 °C and 425 °C, respectively. In addition, we present our recent results using spin-on dielectrics to planarize and insulate stainless steel substrates for flexible displays and high resolution QVGA mobile displays.

Performance properties in thick film silicate dielectric layers using molecular modeling

Molecular modeling was employed to understand various properties found in thick film dielectric layers derived from solution-based sol-gel formulation in order to aid their development. For instance, for formulations used as planarizing layers, it was discovered that during certain process steps ionic components could be introduced which greatly influences the extent of shrinkage by up to 50%, a phenomenon not normally seen in traditional spin-on glasses (SOG). Thermodynamic calculations showed that specific ionic contaminants contribute to the cure state of the material, potentially depolymerizing the material and promoting the formation of structures that are more easily deformed. Volumetric analysis and compaction modeling demonstrated that the high extent of shrinkage is expected, depending upon the final structure of the silicate. Calculation of the relative modulus of the different suspected structures also showed that depolymerized structures contribute to the ease of compaction.

12.2: Solution Processable Passivation Layer for Active Matrix Thin Film Transistors on Rigid and Flexible Substrates

Organosiloxane based spin on planarizing dielectrics (PTS-E and PTS-R) were developed for application in flat panel displays as a replacement to conformal chemical vapor deposited SiNx. Here we demonstrate the successful use of siloxane-based material as a passivation layer for active matrix α-Si thin film transistors (TFT) on both rigid and flexible substrates.

Using Molecular Modeling Trending to Understand Dielectric Susceptibility in Dielectrics for Display Applications

Dielectric materials are universally used in the fabrication and packaging of microelectronic and display devices, as well as used in discrete devices such as sensors, switches and photovoltaics. However, as device and interconnect sizes become smaller, the question of the source of electrical failure becomes more and more important. During the development of these materials it has been found that small changes in the molecular structure can lead to small increases in conductivity which is undesirable for most applications. Although important to the final commercial acceptance of the dielectric, leakage current is often one of the final properties measured when developing the chemistry of the dielectric, so a dielectric with very good mechanical properties can ultimately fail at end-user applications due to the poor electrical properties. Knowledge of the susceptibility for electrical failure can be a great aid to the developer, and molecular modeling used in a trend analysis has been found useful to predict tendencies.

Understanding leakage current susceptibility in dielectrics using molecular modeling

Dielectric materials are universally used in the fabrication and packaging of transistors in microelectronics and displays, as well as used in discrete devices such as sensors, switches and photovoltaics. However, as device and interconnect sizes become smaller, the question of the source of electrical failure becomes more and more important. During the development of these materials it has been found that small changes in the molecular structure can lead to small increases in conductivity which is undesirable for most applications. Although important to the final commercial acceptance of the dielectric, leakage current is often one of the final properties measured when developing the chemistry of the dielectric, so a dielectric with very good mechanical properties can ultimately fail at customer due to the electrical properties. Knowledge of the susceptibility for electrical failure can be a great aid to the developer.

49.6L: Late-News Paper: Transparent Organic Planarizing Films for Low Temperature Display Applications

The development of organic planarizing films that can be cured at low temperature and demonstrate high optical transparency is reported. This material is targeted for low temperature (<200°C) applications with thermally-sensitive substrates. The use of a novel catalyst has permitted the low temperature curing to occur while providing formulation stability even at elevated (40°C) temperature. These organic materials are designed to compliment other materials offerings for the display industry in applications where high temperature processing cannot be accommodated.

Dielectric constant trends in silicate spin-on glasses

The prediction of the effects on the dielectric constant in thin film dielectrics is of interest in a variety of electronic applications ranging from microelectronics to displays and MEMS applications. This paper discusses the link between the molecular structure of a silicate spin-on dielectric and the final processed dielectric constant by relating trends in the calculated dielectric constant using Density Functional Theory to measurements made on thin films produced during formulation and cure studies. For this investigation, silanol and water content, film density and stress were varied both computationally and experimentally in order to understand the trade-off contributing toward the final dielectric constant. It was found that there is a non-trivial relationship between all these variables which relates back to the molecular structure of the final material, expressed by the density and the stress state of the material. This underlines the importance of finding stable processes in order to produce reproducible films.