Ajay Bhatia
Sun Microsystems
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Publication
Featured researches published by Ajay Bhatia.
international solid-state circuits conference | 2007
Shashank Shastry; Ajay Bhatia; Sagar V. Reddy
A single-cycle-access, 128-entry fully-associative multi-context TLB was designed for the Niagara2 SPARCtrade processor in 65nm triple-V, 11M 1.1V CMOS. The circuit includes a dual-storage CAM cell, a modified dual matchline, an 8T 1-read/1-write based RAM, 4-way comparators for cache hit, a priority encoder, a multi-match detect, and data parity
Archive | 2009
Ajay Bhatia
Archive | 2002
Ajay Bhatia; Michael C. Braganza; Shannon V. Morton; Shashank Shastry
Archive | 2007
Shashank Shastry; Sagar V. Reddy; Ajay Bhatia
Archive | 2008
Yolin Lih; Ajay Bhatia; Dennis Wendell; Jun Liu; Daniel Fung; Shyam Balasubramanian
Archive | 2005
Ajay Bhatia; Sanjay M. Wanzakhade; Shashank Shastry
Archive | 2007
Yolin Lih; Dennis Wendell; Jun Liu; Daniel Fung; Ajay Bhatia; Shyam Balasubramanian
Archive | 2003
Ajay Bhatia; Michael C. Braganza; Shannon V. Morton; Shashank Shastry
Archive | 2008
Yolin Lih; Ajay Bhatia; Dennis Wendell; Jun Liu; Daniel Fung; Shyam Balasubramanian
Archive | 2003
Ajay Bhatia; C Braganza; V Morton; Shashank Shastry
