Alan Kramer

Systems technologies for silicon auditory models

Presents a low-power analog integrated circuit which implements a biologically inspired algorithm for the spectral analysis of sound. The chip features an efficient interface to digital systems; preserving analog processings low-power, high-density advantages requires careful attention to interface issues. To send the spectral representation off chip, it generates a sparse coding of the output spectrum, and communicates the code as an asynchronous stream of events. We store parameters for the spectral analysis algorithm as charge on floating nodes, and support the modification of these parameters via Fowler-Nordheim tunneling, under the control of a digital interface. A prototype system uses this chip as a preprocessor.<<ETX>>

EEPROM as an analog storage device, with particular applications in neutral networks

The use of EEPROM as a compact, high-precision, nonvolatile, and reconfigurable analog storage element is investigated, with particular consideration given to the modifiable weight storage and analog multiplication problems in the hardware implementation of a neural network. Industry-standard digital EEPROM cells can be programmed to any analog value of threshold voltage, but programming characteristics of different devices on the same chip vary. The programming window of a single device also narrows with cycling. These phenomena necessitate the use of a feedback-based programming scheme. Stressing at high temperature suggests that charge retention is good even at 175 degrees C. The linear variation of threshold voltage with temperature implies that temperature compensation of EEPROM is no more complicated than its conventional MOSFET counterpart. The drain current in the saturation region is found to be a quadratic function of drain voltage when the floating-gate-to-drain overlap capacitance is adequately large. A differential circuit that uses this property to generate the multiplication function required of neural net synapses is proposed. >

EEPROM device as a reconfigurable analog element for neural networks

An investigation into the use of EEPROMs (electrically erasable programmable read-only memories) for analog storage is presented, with special consideration given to the problem of reconfigurable weight storage in neural net implementations. Control of either programming voltage or programming time can be used to program the threshold voltage of industry-standard digital EEPROMs to any analog value. Variations in the programming curves of different devices on the same chip as well as changes in the programming curve of a single device with age suggest the need for feedback in any EEPROM-based analog programming strategy. EEPROM charge retention appears to be very good in the analog range and, to first order, temperature compensation of EEPROMs is no more complicated than that for conventional MOS circuits. A particular analog programming scheme which provides about 8 b of resolution per EEPROM device is presented, and the potential uses of EEPROMs in neural net designs are discussed.<<ETX>>