Alexander Kushnerov

Algebraic foundation of self adjusting Switched Capacitors Converters

An algebraic model that describes the operation of binary Switched-Capacitor Converters (SCC) was developed and generalized to any radix case. The proposed approach reduces the power loss by increasing the number of target voltages. In the binary case, the flying capacitors are automatically kept charged to binary weighted voltages and consequently, the resolution of the possible target voltages is binary. The paper presents the underlining theory of the proposed SCC and two new control methods to regulate the output voltage. It is shown that the theoretical formulation of the new number systems can describe many SCC circuits on the market and can help design new SCC with a larger number of target voltages. The theoretical results were verified for the binary case by simulation and experimentally. Excellent agreement was found between the theory and experimental results. The down side of the proposed SCC schemes is the relatively large number of switches which makes the approach more suitable for low power applications.

Algebraic synthesis of Fibonacci Switched Capacitor Converters

A simple algebraic approach to synthesis Fibonacci Switched Capacitor Converters (SCC) was developed. The proposed approach reduces the power losses by increasing the number of target voltages. The synthesized Fibonacci SCC is compatible with the binary SCC and uses the same switch network. This feature is unique, since it provides the option to switch between the binary and Fibonacci target voltages, increasing thereby the resolution of attainable conversion ratios. The theoretical results were verified by experiments.

Analysis and implementation of output voltage regulation in multi-phase switched capacitor converters

A new regulation technique based on duty cycle control of the average currents in the multi-phase switched capacitor converters (SCC) is proposed, analyzed, and verified experimentally for the No effective Charging (NC) case, also known as the fast switching limit (FSL). The regulation is accomplished by adjusting the value of the SCC equivalent resistor. To this end the time slots allotted to each of the SCC topologies are adjusted, while the total switching period is kept constant. The time slots are represented by master and slave duty cycles. By this, the SCC output voltage is expressed analytically as a function of the master duty cycle. In a similar way, analytical expressions for the voltages across the flying capacitors and for the average currents in each of the topologies can be obtained. Excellent agreement was found between the theoretical and experimental results.

Adiabatic charging of capacitors by Switched Capacitor Converters with multiple target voltages

A method for adiabatic charging of a capacitor by Switched Capacitor Converters (SCC) with multiple target voltages is presented, analyzed and verified experimentally. The SCC automatically changes the target voltages from low to high and back, thereby emulating voltage steps. This reduces the energy losses due to small voltage deviations between the SCC output and the charged capacitor and by enabling the stored energy to be recovered back into the power supply. In comparison with the previous method a considerable economy in hardware is achieved by replacing a set of voltage sources by a single SCC. It is shown that the voltage source and the switch resistance in the regular charging circuit can be emulated by the SCC equivalent circuit. Furthermore, such emulation provides the same step response if the SCC is operated close to the no-charge (NC) mode. This theoretical prediction was approved experimentally using the binary SCC.

Unified algebraic synthesis of generalized Fibonacci Switched Capacitor Converters

A unified algebraic approach to the synthesis of generalized Fibonacci Switched Capacitor Converters (SCC) has been developed. The proposed approach reduces the power losses by increasing the number of target voltages. It is shown that the binary and Fibonacci SCC are private cases of the proposed approach. Furthermore, the proposed generalized SCC is built around the same switch network as the binary and Fibonacci SCC. This feature is extremely beneficial since it provides the option to switch between the different target voltages, thereby increasing the resolution of attainable conversion ratios. In the case of three flying capacitors, six new conversion ratios were introduced in addition to the thirteen that have been realized already. The theoretical results were verified experimentally.

On power losses in switched supercapacitor circuits

Based on the Westerlund-Ekstam model, the paper presents an estimation of power losses in an elementary switched supercapacitor circuit. The power losses are found analytically and represented in the form of equivalent resistance. It is shown that as compared to an ideal capacitor, the use of supercapacitor is preferred at low switching frequency, f <;1/(5RC). In addition, a straightforward method to obtain the parameters of the lumped element model of supercapacitor is proposed. The theoretical results were verified by simulations. Possible applications of the obtained results include characterization of the supercapacitors in the time-domain and equalizing the voltages across serially connected supercapacitors.

A Seminumerical Transient Analysis of Switched Capacitor Converters

The paper proposes an algebraic approach to transient analysis of switched capacitor converters (SCCs). To this end, the SCC is considered as an analog computer that solves the system of linear equations by an iterative method. The result of each iteration represents a point in the step response, whereas the function between the points is reconstructed. To simplify the derivation of the iterative method, each SCC topology is considered as a first-order circuit. The developed method is written as a recurrence relation and under certain conditions can be reduced to the well-known Kaczmarz method. The theoretical predictions were verified by simulations and experimentally and agree well with the results obtained by the equivalent resistance concept.

Multiphase Fibonacci Switched Capacitor Converters

A simple algebraic approach to synthesize Fibonacci switched capacitor converters (SCC) is analyzed and the expected losses are estimated. The proposed approach reduces the power losses by increasing the number of target voltages. The synthesized Fibonacci SCC is compatible with the binary SCC and uses the same switch network. This feature is exceptionally beneficial as it provides the option to switch between the binary and Fibonacci target voltages, increasing thereby the resolution of attainable conversion ratios. The theoretical results were verified by experiments.

On hyperbolic laws of capacitor discharge through self‐timed digital loads

Summary A new model to predict the dynamic behavior of a self-timed autonomous digital system powered by a capacitor is derived. The model demonstrates the hyperbolic shape of the discharging process on the capacitor. It allows a symbolic analysis of the discharging process for complex digital loads comprised of series (stack) and parallel configurations of digital circuits. For example, for a stack configuration, important non-trivial relationships between the hyperbolic discharging rates have been derived based on the knowledge of the velocity saturation index (alpha) of the semiconductor devices used in the digital part. For a realistic (modern complementary metal oxide semiconductor (CMOS) devices) value of alpha = 1.5, the discharging process for a stack of two identical circuits proceeds nearly three times slower than that of any of the stand-alone circuits. This shows a potential way of extending the lifetime of the energy sources by means of stacking self-timed circuits. Although the analysis is based on configurations consisting of ring oscillators in CMOS technology, the analysis method can be extended to other types of self-timed systems and other semiconductor technologies in which the instantaneous switching activity of the digital load is determined by the instantaneous voltage levels provided by the capacitive power transfer mechanism. The analytical derivations have been validated by simulations and experiments carried out with real hardware.

Dual output sub-period interleaved step-up Fibonacci switched capacitor converters

The paper proposes a new class of dual output step-up Fibonacci switched capacitor converters (SCC) and formal approach for its synthesis. The resolution of target voltages in the new SCC has been significantly increased in comparison with the previously developed single-output SCC, where the target voltages are spaced as 1/x. In the case of three flying capacitors the proposed SCC provides six different pairs of target voltages. The output current in the proposed SCC is discontinuous due to the switching between three states over a period. This operation mode is called sub-period interleaving and may help lower the output voltage ripple. The proposed SCC can be used in low-voltage energy harvesting devices and/or in VLSI systems to provide different voltages to different parts of chip. The presented results were verified experimentally.