Alexander Metzner

RTSAT-- An Optimal and Efficient Approach to the Task Allocation Problem in Distributed Architectures

We present an advanced SAT-based approach to the task and message allocation problem of distributed real-time systems. In contrast to the heuristic approaches usually applied to this problem, our approach is guaranteed to find an optimal allocation for realistic task systems running on complex target architectures. Our method is based on the transformation of such scheduling problems into nonlinear integer optimization problems. The core of the numerical optimization procedure we use to discharge those problems is a solver for arbitrary Boolean combinations of integer constraints. While the determination of the task and message placement is done within the satisfiability checking based solver, checking for feasibility w.r.t real-time requirements is performed in a specialized real-time engine under control of the satisfiability solver. Optimal solutions are obtained by imposing a binary search scheme on top of that solver. Experiments show the applicability of our approach to industrial-size task systems

Scheduling distributed real-time systems by satisfiability checking

We present a SAT-based approach to the task and message allocation problem of distributed real-time systems. In contrast to the heuristic approaches usually applied to this problem, our approach is guaranteed to find an optimal allocation for realistic task systems running on complex target architectures. Our method is based on the transformation of such scheduling problems into nonlinear integer optimization problems. The core of the numerical optimization procedure we use to discharge those problems is a solver for arbitrary Boolean combinations of integer constraints. Optimal solutions are obtained by imposing a binary search scheme on top of that solver. Experiments show the applicability of our approach to industrial-size task systems.

Testing real-time task networks with functional extensions using model-checking

Analysis and verification of safety critical systems is inevitable to assure functional and temporal correctness. For checking temporal system behaviour, real-time scheduling analysis has been proved to be an efficient method. As an analytical method, real-time scheduling relies on rather simple task network models mostly ignoring functional behaviour in order to remain computable and efficient. Functional and temporal system behaviour however are often closely related. By abstracting from functional behaviour, scheduling analysis often results in large over-approximation for such systems. We propose a task network model providing extensions to describe also functional system behaviour. The main elements are explicit data objects and tasks with internal states and data dependant executions. Since there are no analytical methods known to be available for such extended models we propose an analysis based on a combination of model-checking and testing. Although this technique does not provide exhaustive verification, it is a first step towards time-accurate analysis of complex realtime systems. Moreover, the approach provides a convenient way to check systems against functional and temporal requirements in contrast to analytical methods that are usually restricted to simple temporal properties like deadlines.

Mapping Task-Graphs on Distributed ECU Networks: Efficient Algorithms for Feasibility and Optimality

This mapping problem has to be solved in many application scenarios. In the automotive industry, for example, the implementation of car functions involves distributed task sets running on multiple electronic control units (ECU) with bus-based inter-task communication, a problem we consider in this paper. Our approach is based on mixed integer linear programming (MILP). MILP is concerned with optimizing a linear function subject to a set of linear constraints where some variables are required to be integer. The current state-of-the art method to solve integer programs is the branch-and-cut (B&C) algorithm and several industrial strength solvers are available. We describe a MILP-model for the mapping problem. Handling this model over to a general MILP-solver does not yield satisfactory results in terms of running time. To make the model more efficient we use the above ingredients: we incorporate a primal heuristic, strengthen the model with further inequalities and generate on-demand cutting planes, which violate the current fractional solution. These routines drastically speed up the solution time

Efficient Model-Checking for Real-Time Task Networks

Formal methods play an important role in the development of safety-critical systems. Their well-defined semantics can be employed for automatic formal system verification. Model-checking, a well-established formal verification technique, is however often restricted to an abstract level due to complexity reasons. For example, checking temporal system behavior with respect to hardware architectures and operating systems is often not possible.Real-time scheduling theory on the other hand provides efficient techniques for temporal analysis of real-world systems at architecture level.However, models used in real-time scheduling theory usually lack a semantics that is compatible to those used by formal specifications. This prevents to verify temporal system behavior at the architecture level with the same formal methods.We present an approach that combines a timed automata representation of task networks and efficient scheduling analysis techniques. Based on existing task network formalisms we define a consistent timed automaton model, and a mapping between both formalisms. We prove that the mapping induces behavioral equivalence of the models.We show an application of the approach by verifying task networks against Live Sequence Charts (LSC).

Automating the design flow for distributed embedded automotive applications: Keeping your time promises, and optimizing costs, too

We address the complete design flow from specification models of new automotive functions captured in Matlab-Simulink to their distributed execution on hierarchical bus-based electronic architectures hosting the release of already deployed automotive functions. We propose an automated design space exploration process resulting in a cost-optimized extension of the existing target hardware and an allocation of balanced task structures automatically derived from the specification model on this modified target hardware which is sufficient to guarantee both system-level timing requirements and deadlines extracted from the Matlab-Simulink specification model.

An optimal approach to the task allocation problem on hierarchical architectures

We present a SAT-based approach to the task and message allocation problem of distributed real-time systems with hierarchical architectures. In contrast to the heuristic approaches usually applied to this problem, our approach is guaranteed to find an optimal allocation for realistic task systems running on complex target architectures. Our method is based on the transformation of such scheduling problems into nonlinear integer optimization problems. The core of the numerical optimization procedure we use to discharge those problems is a solver for arbitrary Boolean combinations of integer constraints. Optimal solutions are obtained by imposing a binary search scheme on top of that solver. Experiments show the applicability of our approach to industrial-size task systems, which are mapped to heterogeneous hierarchical hardware architectures

Exploiting Gaps in Fixed-Priority Preemptive Schedules for Task Insertion

This paper addresses the problem of assigning tasks to embedded control units. The units are considered to be connected via a bus, and tasks may already be deployed onto the units. To save costs, the objective is to insert as many new tasks onto the system as possible. In this setting, to support early design decisions, we present an approximative and fast pre-analysis of the system. We introduce spare-time analysis and the analysis of maximal allowed worst-case execution time to simplify the problem and to achieve a fast solving algorithm, which we implement as mixed-integer linear problem. We conduct experiments to investigate the scalability of the approach with the result that for input sizes of up to 160 tasks with up to 50% not-yet-deployed tasks a solution is found in many cases within reasonable time, our machine needs in the average case 150s. With a reference example, taken from literature, we compare our approach with a similar method and show that our approach is faster.

Scheduling analysis of distributed real-time systems under functional constraints

Scheduling analysis for simplified distributed real-time systems, where the worst case execution time (WCET) of each task is fixed, is well understood. However, often the simplified assumption of fixed WCETs lacks accuracy, e.g. it may have a high variance depending of internal task states. Even if the transition relation of taskpsilas internal states is known, traditionally applied scalable analysis approaches cannot exploit this information in order to yield more accurate response times. In this paper we propose a new type of analysis for this kind of real-time systems. Our approach is based on a transformation of response time analysis into a satisfiability problem, enriched by task internal automata. Evaluations show the powerfulness of this analysis and, furthermore, we will exemplify how our approach can be used to analyse systems with mixed temporal and functional characterisations.

A Design Methodology for Distributed Real-Time Automotive Applications

This paper presents a survey on techniques for supporting a seamless development process of embedded automotive real-time systems. Starting from a set of requirements we show how to integrate early design space exploration, real-time requirements and the definition of component interfaces in a distributed organi- zation of suppliers and OEMs. The main focus is to provide building blocks for a design methodology enabling an AUTOSAR driven process. We also present a method to formally specify requirements in terms of sequence diagrams and how these requirements can be formally checked against implementations by using a rich set of time analysis techniques. Finally, we present our approach of optimizing the implementation in order to reduce the number of ECUs or to increase robustness.