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Alexander V. Butuzov

Intel

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Publication

Featured researches published by Alexander V. Butuzov.

Archive | 2009

Systems, methods, and apparatuses for parallel computing

Boris A. Babayan; Vladimir L. Gnatyuk; Sergey Y. Shishlov; Sergey P. Scherbinin; Alexander V. Butuzov; Vladimir Pentkovski; Denis M. Khartikov; Sergey A. Rozhkov; Roman A. Khvatov

Archive | 2012

METHOD AND APPARATUS FOR REDUCING AREA AND COMPLEXITY OF INSTRUCTION WAKEUP LOGIC IN A MULTI-STRAND OUT-OF-ORDER PROCESSOR

Jayesh Iyer; Nikolay Kosarev; Sergey Y. Shishlov; Alexey Y. Sivtsov; Alexander V. Butuzov; Boris A. Babayan; Vladimir Penkovski

Archive | 2012

METHOD AND APPARATUS FOR SCHEDULING OF INSTRUCTIONS IN A MULTI-STRAND OUT-OF-ORDER PROCESSOR

Boris A. Babayan; Vladimir Pentkovski; Alexander V. Butuzov; Sergey Y. Shishlov; Alexey Y. Sivtsov; Nikolay Kosarev

Archive | 2012

INSTRUCTION SCHEDULING FOR A MULTI-STRAND OUT-OF-ORDER PROCESSOR

Boris A. Babayan; Vladimir Pentkovski; Jayesh Iyer; Nikolay Kosarev; Sergey Y. Shishlov; Alexander V. Butuzov; Alexey Y. Sivtsov

Archive | 2012

METHOD AND APPARATUS FOR RECONSTRUCTING REAL PROGRAM ORDER OF INSTRUCTIONS IN MULTI-STRAND OUT-OF-ORDER PROCESSOR

Nikolay Kosarev; Jayesh Iyer; Sergey Y. Shishlov; Andrey Kluchnikov; Alexander V. Butuzov; Boris Bob Babayan; Vladimir Penkovski; Sergey V. Bulenkov

Archive | 2012

SELECT LOGIC FOR THE INSTRUCTION SCHEDULER OF A MULTI STRAND OUT-OF-ORDER PROCESSOR BASED ON DELAYED RECONSTRUCTED PROGRAM ORDER

Jayesh Iyer; Nikolay Kosarev; Sergey Y. Shishlov; Alexey Y. Sivtsov; Yuriy V Baida; Alexander V. Butuzov; Bob Babayan; Vladimir Pentkovski

Archive | 2016

PROCESSOR LOGIC AND METHOD FOR DISPATCHING INSTRUCTIONS FROM MULTIPLE STRANDS

Jayesh Iyer; Nikolay Kosarev; Sergey Y. Shishlov; Alexey Y. Sivtsov; Boris A. Babayan; Alexander V. Butuzov

Archive | 2016

Befehl und Logik zum Kennzeichnen von Befehlen zur Rückordnung in einem mehrsträngigen Out-of-order-Prozessor

Nikolay Kosarev; Sergey Y. Shishlov; Jayesh Iyer; Alexander V. Butuzov; Boris A. Babayan; Andrey Kluchnikov

Archive | 2015

Multi-core processor for execution of strands of instructions grouped according to criticality

Alexandr Titov; Dmitry Maslennikov; Sergey Y. Shishlov; Sergey P. Scherbinin; Valentin Burov; Ron Gabor; Denis Motin; Oleg Shimko; Kamil Garifullin; Alexander V. Butuzov; Evgeniy Podkorytov; Andrey Chudnovets

Archive | 2015

INCREASING PROCESSOR INSTRUCTION WINDOW VIA SEPERATING INSTRUCTIONS ACCORDING TO CRITICALITY

Alexandr Titov; Dmitry Maslennikov; Sergey Y. Shishlov; Sergey P. Scherbinin; Valentin Burov; Ron Gabor; Denis Motin; Oleg Shimko; Kamil Garifullin; Alexander V. Butuzov; Evgeniy Podkorytov; Andrey Chudnovets

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Sergey Y. Shishlov

Intel

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Nikolay Kosarev

Intel

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Boris A. Babayan

Intel

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Jayesh Iyer

Intel

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Alexey Y. Sivtsov

Intel

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Vladimir Pentkovski

Intel

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Andrey Kluchnikov

Intel

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Sergey P. Scherbinin

Intel

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Alexandr Titov

Intel

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Andrey Chudnovets

Intel

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