Alexandr G. Golenkov

Sub-THz radiation room temperature sensitivity of long-channel silicon field effect transistors

Room temperature operating n-MOSFETs (n-type metal-oxide silicon field effect transistors) used for registration of sub-THz (sub-terahertz) radiation in the frequency range ν = 53−145 GHz are considered. n-MOSFETs were manufactured by 1-μm Si CMOS technology applied to epitaxial Si-layers (d ≈15 μm) deposited on thick Si substrates (d = 640 μm). It was shown that for transistors with the channel width to length ratio W/L = 20/3 μm without any special antennas used for radiation input, the noise equivalent power (NEP) for radiation frequency ν ≈76 GHz can reach NEP ∼6×10−10 W/Hz1/2. With estimated frequency dependent antenna effective area Sest for contact wires considered as antennas, the estimated possible noise equivalent power NEPpos for n-MOSFET structures themselves can be from ∼15 to ∼103 times better in the specral range of ν ∼55–78 GHz reaching NEPpos ≈10−12 W/Hz1/2.

Properties of 2x64 linear HgCdTe MBE-grown LWIR arrays with CCD silicon readouts

Mercury-Cadmium-Telluride (MCT) 2 X 64 linear arrays with silicon readouts were designed, manufactured and tested. NCT layers were grown by MBE method on (103) GaAs substrates with CdZnTe buffer layers. 50 X 50 mm n-p-type photodiodes were formed by 80 divided by 120 keV boron implantation. The dark current at 100 mV reversed biased diodes was within 15*30 nA and zero bias resistance-area product was within R0 approximately equals 20 divided by 50 Ohm X cm2. Silicon read-out circuits were designed, manufactured and tested. Read-outs with skimming and partitioning functions were manufactured by n-channel MOS technology with buried or surface channel CCD register. The parameters of LWIR MCT linear arrays with cutoff wavelength (lambda) co 10.0 divided by 12.2 micrometers and Si readouts were tested separately before hybridization. The HgCdTe arrays and Si readouts were hybridized by cold welding In bumps technology. With skimming mode used for integration time of 24-30 ms for such MCT n-p-junctions, the detectivity D*(lambda ) approximately equals 4 X 1010 cmXHz1/2/W. Dark carrier transport mechanisms in these diodes were calculated and compared with experimental data. Two major current mechanisms were included into the current balance equations: trap-assisted tunneling and Shockley-Reed-Hall generation-recombination processes via a defect trap level in the gap. Other current mechanisms (band-to-band tunneling, bulk diffusion) were taken into account as additive contributions. Tunneling rate characteristics were calculated within k-p approximation with the constant barrier electric field. Relatively good agreement with experimental data for diodes with large zero resistance-area products (R0A > 10 OhmXcm2) was obtained.

Superconducting states of lead nanoinclusions in the stoichiometric PbTe matrix

Phase states of lead nanoinclusions in stoichiometric lead telluride in magnetic fields from 0 to 1 kOe are studied in the region of temperatures below the temperature of transition of lead to superconducting state (T = 1.7−6.5 K). It is shown that the lead nanoinclusions behave like type-I superconductors. The sizes of lead nanoinclusions that are in the superconducting state at 1.7 K are no smaller than 200 nm. The experimental temperature dependence of the diamagnetic additional component can be interpreted in the context of a model that takes into account the existence of an “intermediate” superconducting state caused by the geometric parameters of lead nanoinclusions.

MCT linear arrays and associated silicon readouts

MCT 2×64 and 4×288 linear arrays with silicon readouts were designed, manufactured and tested. (013) MCT MBE layers were grown on GaAs substrates with ZnTe and CdTe buffer layers. 2×64 arrays were also manufactured on the base of LPE layers on CdZnTe (111) substrates. 50×55 and ≈30×30 μm area n-p-type photodiodes were formed by 50 ÷ 120 keV boron implantation. The dark currents at V ≈ 100 mV reversed biased diodes used in arrays with cutoff wavelength λco ≈ 10.0 - 12.2 μm were within 15 - 50 nA and zero bias resistance-area products were within R0A ≈ 5 ÷ 20 Ohm×cm2. Designed silicon readouts with skimming and partitioning functions were manufactured by n-channel MOS technology with buried or surface channel CCD register. For achievement with the silicon readouts the deselection function, the “composite” technology approach was considered. In this case both the technology of n-channel CCD and CMOS technology were applied, which allow to weaken considerably the technological design rules for realization of 288×4 readouts with deselection of “dead” elements. It is shown that 2.5 μm design rules for CCD and 2.0 design rules for CMOS technologies allow to realize most of the functions needed for 288×4 MCT array operation with deselection function. Before hybridisation the parameters of MCT linear arrays and Si readouts were tested separately. HgCdTe arrays and Si readouts were hybridised by cold welding In bumps technology. In dependence of FOV with skimming mode used for integration time of 8 - 20 μs detectivities within D*λ (0.4 - 1.7)×1011 cm×Hz1/2/W were achieved in dependence of the array format. Dark carrier transport mechanisms in MCT diodes were calculated and compared with experimental data.

The 4×288 linear FPA on the heteroepitaxial Hg 1-x Cd x Te base

x4×288 heteroepitaxial mercury-cadmium telluride (MCT) linear arrays for long wavelength infrared (LWIR) applications with 28×25 micron diodes and charge coupled devices (CCD) silicon readouts were designed, manufactured and tested. MCT heteroepitaxial layers were grown by MBE technology on (013) GaAs substrates with CdZnTe buffer layers and have cutoff wavelength λco ≈ 11.8 μm at T = 78 K. To decrease the surface influence of the carriers recombination processes the layers with composition changes and its increase both toward the surface and HgCdTe/CdZnTe boundary were grown. Silicon read-outs with CCD multiplexers with input direct injection circuits were designed, manufactured and tested. The testing procedure to qualify read-out integrated circuits (ROICs) on wafer level at T = 300 K was worked out. The silicon read-outs for 4×288 arrays, with skimming and partitioning functions included were manufactured by n-channel MOS technology with buried or surface channel CCD register. Designed CCD readouts are driven with four- or two-phase clock pulses. The HgCdTe arrays and Si CCD readouts were hybridized by cold welding indium bumps technology. With skimming mode used for 4×288 MCT n-p-junctions, the detectivity was about (formula available in paper) for background temperature Tb = 295 K.

Gap deep defect states in narrow-gap semiconductors

The role of deep defect states in recombination processes of narrow-gap IV-VI semiconductors is discussed. Earlier several defect states in the gap of IV-VI semiconductors were revealed. Estimations have shown that defect levels nearer to c-band presumably are connected with metal-rich microinclusions by diameter about 1300 angstrom. These metal- rich inclusions are the result of low metal vacancies enthalpy formation ((Delta) v approximately equals 0.35 eV). These defect states seem are arising at the inclusions and semiconductor matrix boundaries. The density and the diameter of these intrinsic metal microinclusions were calculated from the results of magnetic susceptibility by SQUID-magnetometry experiments in the 1.7 - 20 K temperature region. The levels above the v- band, with the density of states about 3 times lower compared to density of states below c-band, seem to be connected with Te-rich microclusters. The enthalpy of Te-vacancies formation is about 0.45 eV. Experiments and estimations fulfilled on defect levels position and concentrations allow to explain the experiments on band-to-band recombination, photoconductivity and relaxation measurements, stimulated recombination between defect level and v-band, and some nonlinear effects in these semiconductors.

Linear HgCdTe IR FPA 288×4 with bidirectional scanning

The long wavelength (8–12 μm) IR FPA 288×4 based on a hybrid assembly of n+-p diode photosensitive arrays (PA) of HgCdTe (MCT) MBE-grown structures and time delay integration (TDI) readout integrated circuits (ROIC) with bidirectional scanning have been developed, fabricated, and investigated. The p-type MCT structures were obtained by thermal annealing of as-grown n-type material in inert atmosphere. The MCT photosensitive layer with the composition 0.20–0.23 of mole fraction of CdTe was surrounded by the wide gap layers to decrease the recombination rate and surface leakage current. The diode arrays were fabricated by planar implantation of boron ions into p-MCT. The typical dark currents were about 4–7 nA at the reverse bias voltage of 150 mV. The differential resistance R was up to R0 = 1.6×107 Ω zero bias voltage, which corresponded to R0A ∼70 Ω ·cm2 and to the maximal value Rmax = 2.1 × 108 Ω. The bidirectional TDI deselecting ROIC was developed and fabricated by 1.0-μm CMOS technology with two metallic and two polysilicon layers.The IR FPAs were free of defect channels and have the average values of responsivity Sλ = 2.27×108 V/W, the detectivity Dλ* = 2.13 × 1011 cm × Hz1/2 × Wt1, and the noise equivalent temperature difference NETD = 9 mK.

4x288 linear array with hybrid ROIC (CCD + CMOS)

4×288 MCT LWIR linear arrays with 28X25 μm diodes and silicon ROICs were designed, manufactured and tested. MCT layers were grown by MBE technology on (013) GaAs substrates with CdTe/ZnTe buffer layers and λco = 11.2±0.15 μm at T = 78 K. CCD and CMOS “hybrid” technology for design and manufacture of silicon ROICs was used. The design rules 2.5 μm for CCD technology and 2.0 μm design rules for CMOS technology happened to be sufficient to realize most of the functions for 288×4 MCT TDI array. Analog functions were realized by CCD elements. An amplification of the output signals is realized by CMOS buffer amplifier. Decoding and deselection code storing functions are accomplished by digital CMOS elements. 288 information channels were attached to 4 analog outputs operating in the frequency range f≤4 MHz clock. Total consumption power measured is 50 mW at T = 298 K and 70 mW at T = 78 K. Before hybridization the parameters of MCT linear arrays and Si readouts were tested separately. With aperture 280×640 the detectivities Dλ ≈ 1.8.1011 cm.Hz1/2/W were achieved (λco ≈ 11.2 μm, λmax 10.0 μm) with standard deviation about 15 % and operability close to 100 %.

Mid- and Long-Wave IR Detectors Using an Hg1 – xCdxTe Heteroepitaxial Layer

A complete production technology is developed for single-cell and array IR detectors using an MBE-grown Hg1 – x CdxTe heteroepitaxial layer. The array detectors implement a bump-bonded flip-chip hybrid architecture. The arrays are constructed in photodiodes and have a size of 128 × 128 or 4 × 288. The single-cell detectors are built around a photoconductivity cell. The detectors are operated in the wavelength range 3–5 or 8–12 μm and at 78–80 or 200–220 K. Some performance data on the detectors are presented.

2X64 linear LWIR arrays based in HgCdTe MBE-grown layers and CCD silicon readouts

Two X sixty-four linear photodiode arrays on the base of HgCdTe MBE grown layers with CCD silicon readouts were designed, fabricated and tested. It is shown that detectivity for the given arrays even with skimming mode used for long integration times that is need for large square n-p-junctions used and cut-off wavelength of 12.2 micrometer was near the ultimate performance limit.