Alhan Farhanah Abd Rahim

The effect of ecthing duration on structural properties of porous Si fabricated by a new two-steps alternating current photo-assisted electrochemical etching (ACPEC) technique for MSM photodetector

This project presents a new method to fabricate porous Si using two-step Alternating Current Photo-Assisted Electrochemical Etching (ACPEC) technique. The n-type Si (111) was initially etched for a short time to form high density of etch pits and subsequently the sample was anodized in HF solution by using alternating current photo-assisted electrochemical etching (ACPEC) technique. The study aims to investigate the effect of different etching duration on the properties of porous Si. This new method of porous Si fabrication produced higher density, porosity and more uniform distribution of triangular-like pores compared to the sample etched without the initial etching. We observed that the pore size, porosity and average surface roughness were increased with etching duration. Amongst the samples, the 10 minutes of etched sample showed the maximum pore diameter and porosity. Subsequently, metal-semiconductor-metal (MSM) photodetector have been fabricated by depositing Al metal contacts on the non-porous an...

Visible Luminescence of Nanoporous Silicon Using Alternating Current Photo-Assisted Electrochemical Etching for Potential MSM Photodetector

The formation of nanocrystalline porous silicon (PS) was successfully prepared under a novel alternating current (sine-wave a.c. (50 Hz)) photo-assisted electrochemical (ACPEC) etching condition of an n-type (100) silicon (Si) substrate under the illumination of an incandescent white light. As grown Si and PS through conventional direct current(DC) anodization were also included for comparison. The ACPEC formed porous Silicon (PS) with excellent structural and surface morphological characteristic. According to the field emission scanning electron microscope (FESEM) micrographs, the nanoporous structures exhibited pores with uniform circular structure with estimated sizes, ranging between 20.5 nm and 30.5 nm. The atomic force microscopy (AFM) revealed an increase in the surface roughness induced by porosification. As compared to the as-grown Si, PS by AC method exhibited a substantial visible photoluminescence (PL) intensity enhancement with blue-shift associated with the quantum confinement effect of the nanostructure Si. Thermally treated nickel (Ni) finger contact was deposited on the PS to form MSM photodetector. Ni/PS MSM photodetector showed lower dark and higher photocurrent compared to the as grown Si device.

Quantum Confinement of Integrated Pulse Electrochemical Etching of Porous Silicon for Metal Semiconductor Metal Photodetector

Porous silicon (PS) was successfully synthesized via novel integrated pulsed electrochemical etching of an n-type (100) silicon (Si) substrate under various condition. The PS was etched using hydrofluoric acid (HF) based solution and the porosity was optimized by introducing electroless chemical etching process prior to photo electrochemical (PEC) anodization. In the electroless etching, a delay time (TD) of 2 min was applied. After that a cycle time (T) and pause time () of pulsed current were supplied throughout the 30 min PEC etching process. As grown Si and PS through conventional direct current (DC) anodization were also included for comparison. The result obtained showed that applying delay time helps to improve the uniformity and density of the porous structures. AFM indicated that the roughness of the Si increases as the dissolution of the Si occurred. Raman spectroscopy showed that an improvement in the crystalline quality of PS under pulse etching method compared to DC method indicated by the reduction of full width at half maximum (FWHM). A broad visible photoluminescence (PL) was observed from green to red with blue shift as nanocrystallite size decreases which constituted quantum confinement effect from the PS structures. Nickel (Ni) finger contact was deposited onto the PS to form metal semiconductor metal (MSM) photodetector. Ni/PS MSM photodetector by pulse method exhibited higher gain (2 times) compared to conventional Si device at 5 V bias.

Investigation on the Effect of Crystal Orientation Dependence of Pulse Porous Silicon for White Light Emission

Porous silicon (PS) was formed by using an electrochemical pulse etching (PC) and conventional direct current (DC) etching techniques. The study aims to compare the effect of crystal orientations (n-type (100) and n-type (111)) on the formation of the PS under various conditions. For DC etching technique, the silicon wafers were etched in Hydrofluoric (HF) based solution with a current density of J=10 mA/cm2 for 30 minutes. While for the PC process, an electroless chemical etching with a different delay time (Td) of 0 min and 2 min were imposed before PC process starts. After that, the pulse current of J=10 mA/cm2 with the cycle time (T) of 10 ms and pause time (Toff) of 4ms were supplied in 30 min etching time in HF based electrolyte. Three samples from n-type (100) are DC1, PC1 and PC2 while the three samples from n-type (111) are DC2, PC3, and PC4 respectively. Field Emission Scanning Electron Microscopy (FESEM) images showed that the samples from n-type (100) produce more uniform circular structures and dense compared to n-type (111). The introduction of 2 minutes delay during PC process resulted in better structural of PS formation and also the optical properties shown by the Raman and Photoluminescence (PL) spectroscopies. For PL observation, the as grown Si shows no emission at the visible spectrum while all the PS samples (DC and PC techniques) exhibited significant broad spectrum between 500 nm to 900 nm respectively. It can be seen that the uniform circular pore of n-type (100) enhanced the PL emission indicated by the higher PL intensity (PC1 and PC2) compared to PC3 and PC4 from n-type (111). Raman spectroscopy showed that an improvement in the crystalline quality of PS in PC technique compared to DC indicated by the reduction of full width at half maximum (FWHM).

Obtaining Porous Si Characteristic from SEM Images via Non-destructible Method; Image Segmentation

This work aims to introduce an alternative method of obtaining porous density characteristics of porous silicon material by making use of images obtained from the Scanning Electron Microscope. The available and most commonly used method of obtaining the porous density characteristics of semiconductor materials is the gravimetric or quasi-gravimetric method. Using the gravimetric approach requires the sample material to go through various measurements during the multiple stages of processing and it would ultimately result in the destruction of the sample material. The gravimetric approach is flawed as the results it produces are questionable as it is less accurate. Also, it is refutable due to its destructive nature which is caused by the use of alkaline solution which dissolves the sample material at the final stage of the gravimetric process. Therefore, this research introduces an alternative image processing technique which would require only images of the sample material as an input which is obtained via the Scanning Electron Microscope. The image obtained is processed by segmenting the SEM images into two significant black and white regions which allow for the number of pores present on the image to be numerated. From the data obtained from the image, the porosity and porous density of the sample material can be calculated. While being a much simpler process than the commonly used gravimetric method, it is also non-destructive to the sample and is believed to produce a more precise and accurate result.

Study on the Effect of Porous Silicon Sizes for Potential Visible Photodetector

In this work, the characterization of porous silicon (PS) for potential visible light emission was investigated by simulation. SILVACO TCAD simulator was used to simulate PS by using process simulator, ATHENA and device simulator, ATLAS. Different pore diameter sizes of the PS structures were constructed. The structural, optical and electrical characteristics of the structures PS were investigated by current-voltage (I-V), current gain, spectral response and the energy band gap. It was observed that PS enhances the current gain compare to bulk Si and exhibited photo emission in the visible spectrum which constitutes to the quantum confinement effect of the Si in the PS structures.

The study of GaN pn-junction grown on Si substrate by MBE with Ni/Ag as ohmic contact

The gallium nitride (GaN) pn-junctions was grown on silicon (111) substrate by plasma assisted molecular beam epitaxy (PA-MBE) on top of a AlN buffer in order to reduce the strain of the alloy. For GaN pn-junction layers, silicon and magnesium were used as n and p dopants, respectively. The SEM images show a high quality hetero-interface without cracking by optimizing the growth conditions. The full width at half-maximum (FWHM) of the GaN pn-junctions deposited on silicon as determined by X-ray diffraction (XRD) symmetric rocking curve (RC) ω/2θ scans of (0002) plane at room temperature is 0.34°. Raman results show the maximum intensity at 523.63 cm-1 which is attributed to crystalline silicon. All the allowed Raman optical phonon modes of GaN, i.e. the E2 (low), E1 (high) and A1 (LO) are clearly presented, which are located at 147.76 cm-1, 571.65 cm-1 and 737.9 cm-1, respectively. The presence of E1 (high) has led to the evidence of hexagonal-phase character for this GaN pn-junction layer. The non-existence of yellow band emission in PL result confirmed that the thin film is of good optical quality. The GaN pn-junction diode shows a rectifying behavior of current under forward bias.

MODELING 32 V ASYMMETRIC LDMOS USING AURORA AND HSPICE LEVEL 66 FOR 180 NM TECHNOLOGY

In this work, the modeling strategy of 32 V asymmetric High Voltage MOSFETs fabricated in 180 nm High Voltage CMOS process technology using Aurora and Hspice level 66 is presented. The model is validated on the measured characteristics of asymmetric HV MOSFET and implemented on commercial circuit simulator HSPICE. The model shows excellent DC IV characteristics and good behavior for capacitances. The model also exhibits excellent scalability with transistor width and length where the model accuracy of the extracted VTH and IDSAT are within 0 to 5% at T = 25° C.