Ali Y. Duale

Decimal floating-point in z9: an implementation and testing perspective

Although decimal arithmetic is widely used in commercial and financial applications, the related computations are handled in software. As a result, applications that use decimal data may experience performance degradations. Use of the newly defined decimal floating-point (DFP) format instead of binary floating-point is expected to significantly improve the performance of such applications. System z9TM is the first IBM machine to support the DFP instructions. We present an overview of this implementation and provide some measurement of the performance gained using hardware assists. Various tools and techniques employed for the DFP verification on unit, element, and system levels are presented in detail. Several groups within IBM collaborated on the verification of the new DFP facility, using a common reference model to predict DFP results.

A technique to generate feasible tests for communications systems with multiple timers

We present a new model for testing real-time protocols with multiple timers, which captures complex timing dependencies by using simple linear expressions involving timer-related variables. This new modeling technique, combined with the algorithms to eliminate inconsistencies, allows generation of feasible test sequences without compromising their fault coverage. The model is specifically designed for testing to avoid performing full reachability analysis, and to control the growth of the number of test scenarios. Based on extended finite state machines, it is applicable to languages such as SDL, VHDL, and Estelle. The technique models a realistic testing framework in which each I/O exchange takes a certain time to realize and timers can be arbitrarily started or stopped. A software tool implementing this technique is used to generate test cases for the U.S. Army wireless standard MIL-STD 188-220.

Test Generation in the Presence of Conflicting Timers

The UD’s and CCNY’s ongoing research to generate conformance tests for the Army network protocol MIL-STD 188–220 addressed test generation when multiple timers are running simultaneously. A test sequence may become unrealizable if there are conflicting conditions based on a protocol’s timers. This problem is handled in the hitherto generated tests by manually expanding a protocol’s extended FSM based on the set of conflicting timers, resulting in test sequences that are far from minimum-length. Similar inconsistencies, but based on arbitrary linear variables, are present in the extended FSMs modeling VHDL specifications. This paper presents an efficient solution to the conflicting timers problem that eliminates the redundancies of manual state expansion. CCNY’ s inconsistency removal algorithms are applied to a new model for testing protocols with multiple timers, in which complex timing dependencies are captured by simple linear expressions. This test generation technique is expected to significantly shorten the test sequences without compromising their fault coverage.

Modeling VHDL specifications as consistent EFSMs

The dramatic increase in the complexity of digital systems has led to the use of formal description languages such as VHDL. This paper presents the preliminary results on properties of VHDL specifications that allow for automatic test generation without the exponential growth. In general, VHDL specifications can be modeled as extended finite machines (EFSMs). A class of EFSMs, called consistent EFSMs, allows for the finite state machines (FSM) based test generation techniques to be directly applied to VHDL specifications. An algorithm to identify the consistent EFMSs is introduced.

Resolving inconsistencies in EFSM-modeled specifications

The US Department of Defense requires that all digital ASIC systems used within the departments branches should be specified in VHDL (very high speed integrated circuit hardware description language). VHDL specifications are typically modeled as extended finite-state machines (EFSMs). Developing efficient algorithms for EFSM models to generate feasible test sequences with acceptable lengths is a challenging task partly because of the inconsistencies among the actions and the conditions. Inconsistency detection algorithms for EFSM models have been developed at the earlier stages of this study. As part of realizable test sequence generation for VHDL specifications, this paper presents algorithms for the removal of inconsistencies in EFSM models. The proposed method allows the direct application of the FSM-based test generation methods by transforming the EFSM models into equivalent FSMs while avoiding the well-known state explosion problem, where possible. The inconsistency detection and removal algorithms are planned to be applied to the communication protocols used within US Army CECOM and NATO.

Generation of Feasible Test Sequences for EFSM Models

A method that enables the generation of realizable test sequences from a class of EFSMs is presented. If the interdependencies among the variables used in the actions and the conditions of EFSMs are not considered during test generation, the test sequences may be unrealizable in a test laboratory. Algorithms for the detection and elimination of inconsistencies from the EFSM models are presented. Once inconsistencies are eliminated, realizable test sequences can be generated from the resulting consistent EFSM by using the methods available for FSM models.

Test generation for EFSM models of complex army protocols with inconsistencies

The generation of feasible test sequences for EFSM models of communication and computer systems remains an open research problem mainly because of the inconsistencies among the actions and conditions of these models. A method that enables the generation of only feasible test sequences from a class of EFSM models by eliminating inconsistencies in these models is presented. Once inconsistencies are eliminated, realizable test sequences can be generated from the resulting consistent EFSMs by using the FSM-based test generation methods. The presented algorithms are currently being used to generate tests for the protocols with multiple conflicting timers running concurrently such as the MIL-STD 188-220.

Efficient test generation for army network protocols with conflicting timers

During the University of Delaware (UDs) and CCNYs (City College of the City University of New York) ongoing effort to generate conformance tests for the US Army network protocol MIL-STD 188-220, a significant obstacle has been addressed-when multiple timers are running simultaneously, a test sequence may become unrealizable if there are conflicting conditions based on the protocols timers. This problem, termed the conflicting timers problem, is handled in the hitherto generated tests by manually expanding a protocols extended FSM based on the set of conflicting timers, resulting in test sequences that are far from minimum-length. Similar inconsistencies, but based on arbitrary linear variables, are present in the extended FSMs modeling VHDL specifications. This paper presents an efficient solution to the conflicting timers problem that eliminates the redundancies of manual state expansion. CCNYs inconsistency removal algorithms are applied to a new model for real-time protocols with multiple timers. The new model captures complex timing dependencies by using simple linear expressions. this modeling technique, combined with the CCNYs inconsistency removal algorithms, is expected to significantly shorten the test sequences without compromising their fault coverage.

Towards testing SDL specifications: Models and fault coverage for concurrent timers

A recent model for testing systems with multiple timers is extended to compute proper input delays and timeout settings, and is applied to several types of timers required in a testing procedure. In the model, any transition in the specification can be made conditional on a set of running timers. Depending on the path taken to reach an edge, the values of the timer variables may render the traversal of the edge infeasible. The presented modeling technique, combined with the INconsistencies DEtection and ELimination (INDEEL) algorithms, allows the generation of feasible test sequences. The model also offers the flexibility to define timer lengths as variables, and have the INDEEL find the appropriate timer ranges. An approach to apply this new methodology to SDL timed extensions (guarding and delaying timers) is presented.

Testing of Communicating Systems

Session I: Testing Theory and Foundations.- Symbolic Execution Techniques for Test Purpose Definition.- Controllable Combinatorial Coverage in Grammar-Based Testing.- A Logic for Assessing Sets of Heterogeneous Testing Hypotheses.- Session II: Testing Non-deterministic and Probabilistic Systems.- Bounded Sequence Testing from Non-deterministic Finite State Machines.- LaTe, a Non-fully Deterministic Testing Language.- Customized Testing for Probabilistic Systems.- Session III: Testing Internet and Industrial Systems.- Generating Test Cases for Web Services Using Extended Finite State Machine.- Towards the Testing of Composed Web Services in 3rd Generation Networks.- Application of Two Test Generation Tools to an Industrial Case Study.- Session IV: TTCN-3.- Performance Analysis of Concurrent PCOs in TTCN-3.- Use of TTCN-3 for Software Module Testing.- Distributed Load Tests with TTCN-3.- Session V: Compositional and Distributed Testing.- Analyzing the Impact of Protocol Changes on Tests.- Detecting Observability Problems in Distributed Testing.- Compositional Testing of Communication Systems.- Session VI: FSM-Based Testing and Diagnosis.- FSM Test Translation Through Context.- Using Distinguishing and UIO Sequences Together in a Checking Sequence.- Reducing the Lengths of Checking Sequences by Overlapping.- Session VII: Timed Systems.- Test Case Minimization for Real-Time Systems Using Timed Bound Traces.- Symbolic and on the Fly Testing with Real-Time Observers.- Using TimedTTCN-3 in Interoperability Testing for Real-Time Communication Systems.- Session VIII: Testing for Security.- Test Generation for Network Security Rules.- Message Confidentiality Testing of Security Protocols - Passive Monitoring and Active Checking.