Alireza Narimannezhad

Arrays of micro Penning-Malmberg traps: AN approach to fabricate very high aspect ratios

This paper reports on the progress of fabrication of very high aspect ratio (1000:1) micro-Penning-Malmberg trap arrays designed to store antimatter. The structure consists of thousands of 100μm diameter tubes etched by deep reactive ion etching through Si wafers. Cycles of thermal oxidation and wet etching in buffered oxide etch (BOE) minimized the sidewalls roughness and ensured a complete coating during gold sputtering. The wafers were then aligned and stacked in order to create the microtubes. Uniform plating with mean roughness of Ra=600nm was achieved by tuning the electroplating parameters.

Microfabrication of high aspect ratio microtube arrays to store high density charged particles

Fabrication of a portable high-density charged particle trap with an array of micro-Penning-Malmberg traps (microtraps) with substantially lower end barrier potentials than conventional Penning-Malmberg traps is presented [1]. The microtraps are designed for antimatter storage such as positrons. The fabrication of large length to radius aspect ratio (1000:1) microtrap arrays involved advanced techniques including photolithography, deep reactive ion etching (DRIE) of silicon wafers to achieve through-vias, gold sputtering of the wafers surfaces and inside the vias, and thermal compression bonding. The bonded stacks were gold electroplated to achieve a uniform gold surface to minimize the patch effects. Positron losses occur in experimentation by trap imperfections such as misalignment of microtraps, asymmetries, and physical imperfections on the surfaces. This paper describes the fabrication issues encountered and addresses geometry errors and asymmetries.

Pushing the Limits of Bonded Multi-Wafer Stack Heights While Maintaining High Precision Alignment

The last decade in advanced microelectronics has shown great interest in 3-D architectures, which was paved by multi-wafer alignment technologies. However, many limitations remain in the fabrication of ultratall stacks as the alignment becomes more challenging and very costly. In this paper, a new cost-effective alignment technique was employed using a set of sapphire rods in through-wafer holes. Cross-sectional analysis, edge profilometry, and electron transmission tests showed ~2 μm alignment tolerances over 1 cm and ~4 μm over 10-cm tall stacks. An off-angle gold sputtering method was developed to fully coat vias of 5:1 aspect ratio before bonding. Also, a new “Stamping” technique is introduced to coat the vias to a desired height where necessary. In this paper, parallel microtubes with the aspect ratios of 1000:1 were formed by aligning ~200 wafers, each including 20000 gold-coated vias for storing charged particles.