Amir Chass

Sparse chip equalizer for DS-CDMA downlink receivers

We present a low complexity sparse chip equalization scheme for DS-CDMA downlink receivers in which only a small number of filter taps are selected to be non-zero, thereby reducing the computational complexity significantly. Low complexity algorithms for selecting the timings and complex amplitudes of the sparse equalizer taps are proposed. The excellent performance achieved by this scheme combined with its low complexity makes it an attractive choice for the DS-CDMA based cellular downlink receivers.

Control channel assisted chip equalization for CDMA downlink adaptive modulation and coding system

Linear chip equalizers designed especially for the downlink have been a subject of extensive research and various methods have been proposed. In this paper, we consider the equalization problem in adaptive modulation and coding (AMC) system. An inherent feature of an AMC system is a high reliability of control information used for modulation type and coding rate signaling. We propose a linear equalization scheme exploiting this feature. The performance of the method is evaluated in HSDPA 3G cellular link.

Iterative decoding algorithms for real time software implementation in wireless communication systems

Iterative decoding has emerged as one of the most promising techniques for improving receivers performance. This paper is focused on exploring the feasibility of software implementation of iterative decoding algorithms for the 2nd and 3rd generations of the cellular communications standards. Two examples for iterative decoding algorithms are described: turbo decoding for the 3G cellular standards and turbo equalization for a GSM receiver. The principles described can be used to efficiently construct and implement other iterative decoding algorithms.