Amit S. Kesar

A Low-Jitter 1.8-kV 100-ps Rise-Time 50-kHz Repetition-Rate Pulsed-Power Generator

A 1.8-kV 100-ps rise-time pulsed-power generator operating at a repetition frequency of 50 kHz is presented. The generator consists of three compression stages. In the first stage, a power MOSFET produces high voltage by breaking an inductor current. In the second stage, a 3-kV drift-step-recovery diode cuts the reverse current rapidly to create a 1-ns rise-time pulse. In the last stage, a silicon-avalanche shaper is used as a fast 100-ps closing switch. Experimental investigation showed that, by optimizing the generator operating point, the shot-to-shot jitter can be reduced to less than 13 ps. The theoretical model of the pulse-forming circuit is presented.

Cyclotron-resonance-maser arrays

The cyclotron-resonance-maser (CRM) array is a radiation source which consists of CRM elements coupled together under a common magnetic field. Each CRM-element employs a low-energy electron-beam which performs a cyclotron interaction with the local electromagnetic wave. These waves can be coupled together among the CRM elements, hence the interaction is coherently synchronized in the entire array. The implementation of the CRM-array approach may alleviate several technological difficulties which impede the development of single-beam gyro-devices. Furthermore, it proposes new features, such as the phased-array antenna incorporated in the CRM-array itself. The CRM-array studies may lead to the development of compact, high-power radiation sources operating at low voltages. This paper introduces new conceptual schemes of CRM-arrays, and presents the progress in related theoretical and experimental studies in our laboratory. These include a multimode analysis of a CRM-array, and a first operation of this device with five carbon-fiber cathodes.

Efficiency Study of a 2.2 kV, 1 ns, 1 MHz Pulsed Power Generator Based on a Drift-Step-Recovery Diode

Drift-step-recovery diodes (DSRDs) are used in pulsed-power generators to produce nanosecond-scale pulses with a rise rate of the order of 1 kV/ns. A 2.2 kV, 1 ns pulsed power circuit is presented. The circuit features a single prime switch that utilizes a low-voltage dc power supply to pump and pulse the DSRD in the forward and reverse directions. An additional low-current dc power supply is used to provide a voltage bias in order to balance the DSRD forward with respect to its reverse charge. The DSRD was connected in parallel to the load. In order to study the circuits efficiency, it was operated over a wide range of operating parameters, including the main and bias source voltages, and the trigger duration of the prime switch. A peak voltage of 2.2 kV with a rise time of less than 1 ns and a rise rate of 3 kV/ns was obtained, where the efficiency was 24%. A higher efficiency of 52% was obtained when the circuit was optimized to an output peak voltage of 1.15 kV. The circuit was operated in single-shot mode as well as in bursts of up to 100 pulses at a repetition rate of 1 MHz. The experimental results are supported by a PSPICE simulation of the circuit. An analysis of the circuit input and output energies with respect to the MOSFET and DSRD losses is provided.

The Driving Conditions for Obtaining Subnanosecond High-Voltage Pulses From a Silicon-Avalanche-Shaper Diode

Silicon-avalanche-shaper (SAS) diodes are fast-closing switches capable of producing high-voltage pulses with a rise time of ~100 ps. The SAS can be driven by a positive, nanosecond scale, high-voltage pulse applied to its cathode where the magnitude of the driving pulse is correlated to the magnitude of the pulse at the SAS anode (output). Drift-step-recovery diodes (DSRDs) are fast-opening switches capable of producing high-voltage pulses with a rise time of the order of 1 ns. Thus, DSRDs are good candidates for driving SAS diodes. In this paper, the SAS output is studied with respect to its driving conditions. First, the SAS output is examined with respect to the magnitude and rise time of the driving pulse, utilizing three DSRDs to produce pulses with various rise times from 0.5 to 5 ns. In addition, the effect of the driving pulse repetition frequency (PRF) on the SAS output is studied. An experimental demonstration using a 1.5-kV SAS fabricated at the Ioffe Physical Technical Institute shows the advantage of driving the SAS with the short, 0.5 ns, pulses, and the degradation of performance due to high PRF, up to 10 MHz.

Drift-Step-Recovery Diode Characterization by a Bipolar Pulsed Power Circuit

A stack of drift- step-recovery diodes (DSRDs) can produce high-voltage pulses with a rise rate of the order of 1 kV/ns. Their building blocks, i.e., the DSRD dies, are designed and manufactured at Soreq Nuclear Research Center based on silicon epitaxial layers. A characterization circuit for DSRDs is presented. The circuit features a power MOSFET, which serves to pump the DSRD in the forward direction and then to pulse it in the reverse direction, and a bias voltage source to balance the forward pumping current with respect to the reverse discharge. Placing the DSRD in series between the MOSFET and the load results in temporal and polarity separation of the MOSFET and DSRD pulses at the load, thus allowing viewing of the net DSRD signal. High-voltage probes are employed to measure the MOSFET and load voltages. Based on this measurement, we formulate the voltage and current extraction of the circuit signals. A 1-ns 190-V epi-Si DSRD die was characterized by this circuit. We show that the DSRD pulses when its reverse discharge is equal to the forward charge, as expected. The DSRD switching loss was measured. An accurate 98% energy balance, which includes the input and output energies with respect to the MOSFET and DSRD switching losses, was obtained. The relationship between the bias voltage, the pumping current, and the main supply voltage is provided. The experimental results are supported by a numerical simulation of the DSRD in the circuit using the Synopsys technological computer-aided design incorporated with a SPICE solver.

Fast switching of drift step recovery diodes based on all epi-Si growth

DSRDs are fast HV opening switching devices. Traditionally, these deep junction devices are fabricated on silicon wafers by deep diffusion. We present DSRD results based on silicon epitaxial layers with as-grown junctions. Static measurements showed a rectifying behavior with leakage currents proportional to device dimension. Pulsed power measurements showed that the switching rate was dependant on the DSRD current density.

Anomalous free electron laser interaction

Free electron lasers (FELs) are considered, typically, as fast wave devices.The normal FEL interaction satisfies the tuning condition oDðkz þ kWÞVz , where o and kz are the em-wave angular frequency and longitudinal wave number, respectively, Vz is the electron axial speed, and kW is the wiggler periodicity.This paper presents an anomalous FEL interaction, which may occur in slow-wave FELs (i.e. loaded by dielectric or periodic structures). The anomalous FEL

Characterization of a Drift-Step-Recovery Diode Based on All Epi-Si Growth

Drift-step-recovery diodes (DSRDs) are fast-opening switches capable of delivering nanosecond-scale high-voltage (HV) pulses into a load. The HV capability is achieved by stacking DSRD dies in series. In this paper, we characterize a DSRD die based on silicon epitaxial layers, which was designed and manufactured at the Soreq Nuclear Research Center. In the static characterization, we have measured the diodes forward- and reverse-blocking voltages, and the junction capacitance. In the dynamic characterization, we have measured the peak voltage and its rise time for a single die, and up to a stack of 32 dies in series, where the stack was operated at current densities of up to ~1.3 kA/cm2. The shortest rise time was 0.65 ns from a stack of five dies. An HV increase of 250 V per die was obtained. The maximum measured peak voltage was 6.09 kV with a rise time of 2.2 ns, and these results being limited by the setup capability.

Optimization and characterization of a 1.5 kV, 100 sp rise time, all-solid-state pulse generator

A state-of-the-art, all-solid-state sub-nanosecond pulse generator is presented. The generator is characterized by three compression stages. The first stage uses a power MOSFET that initially provides current increase in the storage inductor and then breaks the current. The second stage uses a 3 kV drift step recovery diode that cuts the reverse current rapidly to create a less than 1 nanosecond rise time pulse to charge a peaking capacitor. In the last stage, a silicon-avalanche shaper is used as a fast closing switch to discharge the capacitor. A 100 ps rise time, 1.5 kV output with 250 ps FWHM to a 50 Ohm load was achieved at a high pulse repetition frequency of up to 60 kHz with low < 30 ps jitter. The optimization and characterization of this generator will be presented.

Cyclotron-resonance maser array antenna

Summary form only given, as follows. A novel scheme of a tunable active CRM-array antenna is presented. The device consists of a 4 partially-coupled CRM-element oscillators, all sharing a common solenoid (2-3 kG). The CRM-elements are arranged as 4 striplines around a cylindrical waveguide. Each CRM-element operates at low electron-beam voltage and current (18 kV, 0.5 A, respectively). A pitch ratio of v/spl perp//v/sub z//spl sim/1 is applied to the electrons by an array of permanent magnets, were each array-element is arranged as a half-period wiggler. The cyclotron interaction is tuned around 6 GHz. The total radiated power of the active CRM-array antenna is accumulated in the far field. The power and phase-delay are varied by slight detunings of each CRM interaction parameters. The paper presents an experimental status report and a theoretical analysis of the device. The feasibility of a full phased-array operation and lobe steering by an electronic control is discussed. Possible applications for CRM-arrays are proposed.