Anding Zhu

Dynamic Deviation Reduction-Based Volterra Behavioral Modeling of RF Power Amplifiers

A new representation of the Volterra series is proposed, which is derived from a previously introduced modified Volterra series, but adapted to the discrete time domain and reformulated in a novel way. Based on this representation, an efficient model-pruning approach, called dynamic deviation reduction, is introduced to simplify the structure of Volterra-series-based RF power amplifier behavioral models aimed at significantly reducing the complexity of the model, but without incurring loss of model fidelity. Both static nonlinearities and different orders of dynamic behavior can be separately identified and the proposed representation retains the important property of linearity with respect to series coefficients. This model can, therefore, be easily extracted directly from the measured time domain of input and output samples of an amplifier by employing simple linear system identification algorithms. A systematic mathematical derivation is presented, together with validation of the proposed method using both computer simulation and experiment

Open-Loop Digital Predistorter for RF Power Amplifiers Using Dynamic Deviation Reduction-Based Volterra Series

In this paper, we propose an efficient open-loop digital predistorter (DPD) derived from the dynamic deviation reduction-based Volterra series that allows compensation for both nonlinear distortion and memory effects induced by RF power amplifiers in wireless transmitters. In this approach, the parameters of the predistorter can be directly extracted from an offline system identification process. This eliminates the usual requirement for a closed-loop real-time parameter adaptation, which dramatically reduces the implementation complexity of the system. It is shown that a further reduction in system complexity can be achieved by applying under-sampling theory in the model extraction and utilizing parameter interpolation in the DPD implementation. Experimental results show that by utilizing this technique with only a small number of parameters, nonlinear distortion induced by the PA can be significantly reduced, as evaluated by both adjacent channel power ratio reduction and normalized root mean square error improvement. A comparison with a memoryless polynomial function based predistorter and an analysis of the impact of decresting are also presented.

Band-Limited Volterra Series-Based Digital Predistortion for Wideband RF Power Amplifiers

The continuously increasing demand for wide bandwidth creates great difficulties in employing digital predistortion (DPD) for radio frequency (RF) power amplifiers (PAs) in future ultra-wideband systems because the existing DPD system requires multiple times the input signal bandwidth in the transmitter and receiver chain, which is sometimes almost impossible to implement in practice. In this paper, we present a novel band-limited digital predistortion technique in which a band-limiting function is inserted into the general Volterra operators in the DPD model to control the signal bandwidth under modeling, which logically transforms the general Volterra series-based model into a band-limited version. This new approach eliminates the system bandwidth constraints of the conventional DPD techniques, and it allows users to arbitrarily choose the bandwidth to be linearized in the PA output according to the system requirement without sacrificing performance, which makes the DPD system design much more flexible and feasible. In order to validate this idea, a high-power LDMOS Doherty PA excited by various wideband signals, including 100-MHz long-term evolution advanced signals, was tested. Experimental results showed that excellent linearization performance can be obtained by employing the proposed approach. Furthermore, this technique can be applied to other linear-in-parameter models. In future ultra-wideband systems, this new technique can significantly improve system performance and reduce DPD implementation cost.

Digital Predistortion for Envelope-Tracking Power Amplifiers Using Decomposed Piecewise Volterra Series

Due to dynamic changes of supply voltage, envelope-tracking (ET) power amplifiers (PAs) exhibit very distinct characteristics in different power regions. It is very difficult to compensate the distortion induced by these amplifiers by employing conventional digital predistortion techniques. In this paper, by introducing a new piecewise Volterra model based on a vector threshold decomposition technique, we first set several thresholds in the input power level according to the PA characteristics, and decompose the input complex envelope signal into several sub-signals by using these thresholds. We then process each sub-signal separately by employing the dynamic deviation reduction-based Volterra series, and finally recombine them together to produce the predistorted output. Experimental results show that by using this new decomposed piecewise digital predistorter model, the distinct characteristics of the ET system at different signal power levels can be accurately modeled, and thus, the distortion, including both static nonlinearities and memory effects, caused by the amplifier nonlinear behavior can be effectively compensated.

An efficient Volterra-based behavioral model for wideband RF power amplifiers

Efficient and accurate behavioral modeling of RF power amplifiers with memory effects becomes of critical importance in the system-level analysis and design of wide band digital communication systems. In this paper, we present a novel Volterra-based behavioral model implemented through a bank of parallel FIR filters, the coefficients of which may be readily extracted from time-domain measurement or circuit envelope simulation. This model can reproduce the nonlinear distortion of power amplifiers with memory effects excited by wideband modulated signals with better accuracy compared to conventional quasi-memoryless models.

Low-Cost FPGA Implementation of Volterra Series-Based Digital Predistorter for RF Power Amplifiers

This paper presents a low-complexity and low-cost hardware implementation of a Volterra series-based digital predistorter (DPD). This is achieved by introducing two novel model complexity reduction techniques into the system, namely, lookup table assisted gain indexing and time-division multiplexing for multiplier sharing. Experimental results show that this novel DPD implementation uses much less hardware resources, but still maintains excellent performance compared to conventional approaches.

Optimized Low-Complexity Implementation of Least Squares Based Model Extraction for Digital Predistortion of RF Power Amplifiers

Least squares (LS) estimation is widely used in model extraction of digital predistortion for RF power amplifiers. In order to reduce computational complexity and implementation cost, it is desirable to use a small number of training samples in the model parameter estimation. However, due to strong correlations between data samples in a real transmit signal, the ill-conditioning problem becomes severe in standard LS, which often leads to large errors occurring in model extraction. Using a short training sequence can also cause mismatch between the statistical properties of the training data and the actual signal that the amplifier transmits, which could degrade the linearization performance of the digital predistorter. In this paper, we propose first to use a 1-bit ridge regression algorithm to eliminate the ill-conditioning problem in the LS estimation and then use root-mean-squares based coefficients weighting and averaging approach to reduce the errors caused by the statistical mismatch. Experimental results show that the proposed approach can produce excellent model extraction accuracy with only a very small number of training samples, which dramatically reduces the computational complexity and the system implementation cost.

Digitally Assisted Dual-Switch High-Efficiency Envelope Amplifier for Envelope-Tracking Base-Station Power Amplifiers

This paper presents a novel digitally assisted dual-switch envelope amplifier used for wideband high-efficiency envelope-tracking (ET) base-station power amplifiers (PAs). The proposed envelope amplifier comprises two switching buck converters to provide the high-power ET signal to the RF stage and a wideband linear stage to maintain the envelope signal accuracy. The control technique utilizes digital signal processing in conjunction with analog hysteretic feedback to separately control two high-efficiency switchers and thus successfully reduces power consumption of the linear stage, especially for applications requiring high peak-to-average ratio (PAPR) signals. The overall ET system was demonstrated using GaAs high-voltage HBT PAs. For a variety of signals ranging from 6.6- to 9.6-dB PAPR and up to 10-MHz RF bandwidth, the overall system power-added efficiency reached 50%-60%, with a normalized root-mean-square error below 1% and the first adjacent channel leakage power ratio of -55 dBc after digital predistortion with memory mitigation, at an average output power above 20 W and 10-dB gain.

An adaptive Volterra predistorter for the linearization of RF high power amplifiers

An efficient digital baseband predistortion linearizer is presented to compensate for nonlinear distortions induced by RF high power amplifiers in wireless communication systems. The proposed approach utilizes an indirect learning architecture with a fast recursive least squares (RLS) filtering algorithm, implemented using V-vector algebra, to update the coefficients of a Volterra-based predistorter. There is no requirement for an initial identification of the nonlinear characteristics of HPA as in linearizers based on conventional pth-order inverse methods. Simulation results show that that good performance and low computational complexity are achieved in the linearization of both narrow and wide bandwidth systems.

Green Communications: Digital Predistortion for Wideband RF Power Amplifiers

The RF PA, as one of the most essential components in any wireless system, suffers from inherent nonlinearities. The output of a PA must comply with the linearity requirement specified by the standards. Due to its satisfactory linearization capability, DPD has been widely accepted as one of the fundamental units in modern and future wideband wireless systems. With the help of this flexible digital technology, the inherent linearity problem of PAs operating in the saturation region can be significantly improved, which enables us, the wireless engineers, to create more suitable RF transceiver architectures to provide wireless access with better user experience (linearity perspective) and less power waste (power efficiency perspective). This moves us one more step towards the ultimate green communications. In this article, we discussed the DPD techniques in the context of linearizing nonlinear RF PAs. As the computing-horsepower and the transistor-density of digital IC increases while the cost per transistor decreases, the concept that uses digital enhancement techniques to eliminate active analog imperfects will gain more attention from both industry and academia.