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Dive into the research topics where Andrea Neviani is active.

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Featured researches published by Andrea Neviani.


IEEE Microwave and Wireless Components Letters | 2006

A fully integrated differential CMOS LNA for 3-5-GHz ultrawideband wireless receivers

Andrea Bevilacqua; Christoph Sandner; Andrea Gerosa; Andrea Neviani

A fully integrated differential low-power low-noise amplifier (LNA) for ultrawideband (UWB) systems operating in the 3-5-GHz frequency range is presented. A two-section LC ladder input network is exploited to achieve excellent input match in a wideband fashion and to optimize the noise performance. Prototypes fabricated in a digital 0.13-mum complementary metal oxide semiconductor technology show the following performance: 9.5-dB peak power gain, 3.5-dB minimum noise figure, -6-dBm input-referred 1-dB compression point, and -0.8-dBm input-referred third-order intercept point, while drawing 11mA from a 1.5-V supply. The realized LNA is compared with previously reported LNAs tailored for the same frequency range


IEEE Transactions on Circuits and Systems Ii-express Briefs | 2007

Transformer-Based Dual-Mode Voltage-Controlled Oscillators

Andrea Bevilacqua; Federico P. Pavan; Christoph Sandner; Andrea Gerosa; Andrea Neviani

In this brief, we propose to use a transformer-based resonator to build a dual-mode oscillator, e.g., a system capable of oscillating at two different frequencies without recurring to switched inductors, switched capacitors, or varactors. The behavior of the resonator configured as a one-port and a two-port network is studied analytically, and the dependence of the quality factor on the design parameters is thoroughly explored. These results, combined with the use of traditional frequency tuning techniques, are applied to the design of a wide-band voltage-controlled oscillator (VCO) that covers the frequency range 3.6-7.8 GHz. The performance of the designed VCO, implemented in a digital 0.13-mum CMOS technology, has been studied by transistor-level and 2.5D electromagnetic simulation (Agilent Momentum). A typical phase noise performance at 1-MHz offset of -104 dBc/Hz has been predicted, while the power consumption ranges from 1 to 8 mW, depending on the VCO configuration


IEEE Transactions on Electron Devices | 1999

On-state and off-state breakdown in GaInAs/InP composite-channel HEMT's with variable GaInAs channel thickness

Gaudenzio Meneghesso; Andrea Neviani; R. Oesterholt; M. Matloubian; Takyiu Liu; J.J. Brown; C. Canali; Enrico Zanoni

Short-channel Ga/sub 0.47/In/sub 0.53/As high electron mobility transistors (HEMTs) suffer from low breakdown voltages due to enhanced impact-ionization effects in the narrow bandgap channel. This could limit the application of single-channel devices to medium power millimeter-wave systems. A composite Ga/sub 0.47/In/sub 0.53/As/InP channel, which exploits the high electron mobility of Ga/sub 0.47/In/sub 0.53/As at low electric fields, and the low impact-ionization and high electron saturation velocity of InP at high electric fields can overcome this limitation. In this paper we study on-state and off-state breakdown of Ga/sub 0.47/In/sub 0.53/As/InP composite-channel HEMTs with a variable GaInAs channel thickness of 30, 50, and 100 /spl Aring/. Reduction of channel thickness leads to the improvement of both on-state and off-state breakdown voltages. In on-state conditions, the enhancement in the effective Ga/sub 0.47/In/sub 0.53/As channel bandgap that takes place when the channel thickness is reduced to the order of the de Broglie wavelength (channel quantization) effectively enhances the threshold energy for impact-ionization, which is further reduced by real space transfer of electrons from the Ga/sub 0.47/In/sub 0.53/As into the wider bandgap InP. Channel thickness reduction also causes a decrease in the sheet carrier concentration in the extrinsic gate-drain region and therefore, a reduction of the electric field beneath the gate. This, together with the adoption of an Al/sub 0.6/In/sub 0.4/As Schottky layer (increasing the gate Schottky barrier height), leads to excellent values of the gate-drain breakdown voltage. In conclusion, composite channel InAlAs/GaInAs/InP HEMTs, thanks to the combined effect of effective band-gap increase, enhanced real space transfer into InP, and sheet carrier density reduction, allow a good trade-off between current driving capability and both on-state and off-state breakdown voltage.


IEEE Journal of Solid-state Circuits | 2009

Analysis and Design of an Integrated Notch Filter for the Rejection of Interference in UWB Systems

Alessio Vallese; Andrea Bevilacqua; Christoph Sandner; Marc Tiebout; Andrea Gerosa; Andrea Neviani

A 0.13-mu m CMOS fourth-order notch filter for the rejection of the 5-6 GHz interference in UWB front-ends is reported. The filter is integrated into an analog front-end for Mode #1 UWB. A thorough analysis based on a simplified model of the filter is carried out. An algorithm for the automatic tuning and calibration of the filter is also discussed and demonstrated. Two versions of the circuit are designed and fabricated: the first comprises a low-noise amplifier and the filter, and the second expands it to a complete front-end. In the latter version the filter was also redesigned. The filter provides more than 35 dB of attenuation and has a tuning range of 900 MHz, adding less than 30% power consumption to the LNA. The out-of-band IIP3 (higher than -13.2 dBm with the filter off) takes a 9-dB advantage from the filter and the compression of the gain due to the out-of-band blocker is reduced by at least 6 dB in the complete front-end. The conversion gain of the front-end is 25 dB per channel, its average noise figure is lower than 6.2 dB, and its in-band 1-dB compression point is higher than - 30 dBm at a power consumption of 32 mW.


IEEE Transactions on Semiconductor Manufacturing | 2000

Analysis of the impact of process variations on clock skew

Stefano Zanella; Alessandra Nardi; Andrea Neviani; Michele Quarantelli; Sharad Saxena; Carlo Guardiani

In this paper, we analyze the impact of process variations on the clock skew of VLSI circuits designed in deep submicrometer technologies. With smaller feature size, the utilization of a dense buffering scheme has been proposed in order to realize efficient and noise-immune clock distribution networks. However, the local variance of MOSFET electrical parameters, such as V/sub T/ and I/sub DSS/, increases with scaling of device dimensions, thus causing large intradie variability of the timing properties of clock buffers. As a consequence, we expect process variations to be a significant source of clock skew in deep submicrometer technologies. In order to accurately verify this hypothesis, we applied advanced statistical simulation techniques and accurate mismatch measurement data in order to thoroughly characterize the impact of intradie variations on industrial clock distribution networks. The comparison with Monte Carlo simulations performed by neglecting the effect of mismatch confirmed that local device variations play a crucial role in the design and sizing of the clock distribution network.


IEEE Journal of Solid-state Circuits | 2005

A 0.35-/spl mu/m CMOS analog turbo decoder for the 40-bit rate 1/3 UMTS channel code

Daniele Vogrig; Andrea Gerosa; Andrea Neviani; A. Graell i Amat; Guido Montorsi; Sergio Benedetto

This work presents the design and the test results of an analog decoder for the 40-bit block length, rate 1/3, Turbo Code defined in the UMTS standard. The prototype is fully integrated in a three-metal double-poly 0.35-/spl mu/m CMOS technology, and includes an I/O interface that maximizes the decoder throughput. After the successful implementation of proof-of-concept analog iterative decoders by different research groups in both bipolar and CMOS technologies, this is the first reported prototype of an analog decoder for a realistic error-correcting code. The decoder was successfully tested at the maximum data rate defined in the standard (2 Mb/s), with an overall power consumption of 10.3 mW at 3.3 V, going down to 7.6 mW with the decoder core operated at 2 V, and an extremely low energy per decoded bit and trellis state (0.85 nJ for the decoder core alone).


IEEE Transactions on Circuits and Systems | 2009

An Energy-Detector for Noncoherent Impulse-Radio UWB Receivers

Andrea Gerosa; Silvia Soldà; Andrea Bevilacqua; Daniele Vogrig; Andrea Neviani

This study proposes an energy detector for a noncoherent impulse-radio UWB receiver, designed in a 0.18-mum CMOS technology. The squaring functionality is realized exploiting the quadratic characteristic of MOS transistors, and the deviation from such a characteristic due to short channel effects and device mismatch is carefully considered in the paper. The squared signal is integrated using a Gm-C integrator that is interfaced with the squarer using a flipped voltage follower current sensor as a current to voltage converter. The proposed circuit dissipates 5.4 mW for a receiver sensitivity at the antenna of -89 dBm. Synchronization is demonstrated at the system level and some considerations on robustness to narrowband interferers are presented.


IEEE Journal of Solid-state Circuits | 2011

A 5 Mb/s UWB-IR Transceiver Front-End for Wireless Sensor Networks in 0.13

Silvia Soldà; Michele Caruso; Andrea Bevilacqua; Andrea Gerosa; Daniele Vogrig; Andrea Neviani

This paper presents a fully integrated UWB-IR transceiver front-end operating in the 7.25-8.5 GHz band designed for high overall transmission and detection energy efficiency and robustness to interferers. The transceiver front-end features a pulsed transmitter that wakes up when triggered by a digital signal, generates a pulse, and automatically switches-off in less than 2 ns. The receiver includes an LNA, a VGA, a squarer, a windowed integrator, and a comparator to perform PPM demodulation of the data. A prototype of the transceiver front-end was integrated in a 0.13 μm CMOS technology. The transmitter delivers 13 pJ/pulse to the antenna consuming about 190 pJ/b, with an efficiency ηT=7%, well in excess of comparable designs. Using pulse polarity scrambling, it complies with the FCC spectral emission limits up to a pulse repetition frequency (PRF) of 5 MHz. The receiver achieves a sensitivity of -87 dBm at a PRF of 100 kHz, and of -70 dBm at a PRF of 5 MHz, while consuming 4.2 mW. It can tolerate interferers up to -12 dBm at 5.4 GHz.


european solid-state circuits conference | 2006

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Andrea Bevilacqua; Federico P. Pavan; Christoph Sandner; Andrea Gerosa; Andrea Neviani

In this work, a dual-mode oscillator built around a transformer-based resonator is proposed. By making use of this technique, a wideband VCO is designed that features a 69% tuning range spanning from 3.4 GHz to 7 GHz. An excellent 14.8 dB power-frequency-tuning-normalized figure of merit, accounting of -118.6 dBc/Hz phase noise at 1 MHz offset from the 4.6 GHz carrier at 1 mW power consumption, is reported


IEEE Transactions on Microwave Theory and Techniques | 2013

CMOS

Matteo Bassi; Michele Caruso; Muhammad Saeed Khan; Andrea Bevilacqua; Antonio-Daniele Capobianco; Andrea Neviani

The system design of an integrated microwave imaging radar for the diagnostic screening of breasts cancer is presented. A custom integrated circuit implemented in a 65-nm CMOS technology and a pair of patch antennas realized on a planar laminate are proposed as the basic module of the imaging antenna array. The radar operates on the broad frequency range from 2 to 16 GHz with a dynamic range of 107 dB. Imaging experiments carried out on a realistic breast phantom show that the system is capable of detecting tumor targets with a resolution of 3 mm.

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