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Dive into the research topics where Andreas G. Katsiamis is active.

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Featured researches published by Andreas G. Katsiamis.


international solid-state circuits conference | 2012

A 1 V 5 mA Multimode IEEE 802.15.6/Bluetooth Low-Energy WBAN Transceiver for Biotelemetry Applications

Alan Chi Wai Wong; Mark Dawkins; Gabriele Devita; Nikolaos Kasparidis; Andreas G. Katsiamis; Oliver King; Franco Lauria; Johannes Schiff; Alison Burdett

In recent years there has been significant interest and growth in low-power wireless technologies beyond traditional consumer use cases into medical applications [1]. Previously a bastion for application specific wireless propriety protocols, the WBAN community has worked together to develop a communication standard IEEE802.15.6 optimised for low power devices in and around the human body offering the levels of QoS required for personal medical data. Additionally, the consumer electronic industry has migrated existing standardised wireless protocols such as Bluetooth to meet the demanding low energy yet robust needs of WBAN. This paper presents a transceiver chip for both IEEE802.15.6 Narrow-Band (NB) PHY draft [2] and Bluetooth Low Energy (LE) 4.0 standards as well as proprietary protocols. Multi-mode operation offers the best solution in terms of flexibility and interoperability between devices and networks, and the appropriate protocol can be chosen to optimise power consumption in numerous applications scenarios where data throughput varies dramatically; such as streaming multi-lead ECG or episodic temperature measurements. The chip operates in the 2.36GHz MBANs spectrum, specifically allocated for medical devices, and the worldwide 2.4GHz ISM band. A TX for the 780/868/915/950MHz licence-free bands in China, EU, North America and Japan respectively, is also included. The chip is architected and designed for 5mW peak active power dissipation for compatibility with 1V button cells, hence enabling small-form factor non-intrusive body worn applications.


international symposium on circuits and systems | 2010

History and future of auditory filter models

Richard F. Lyon; Andreas G. Katsiamis; Emmanuel M. Drakakis

Auditory filter models have a history of over a hundred years, with explicit bio-mimetic inspiration at many stages along the way. From passive analogue electric delay line models, through digital filter models, active analogue VLSI models, and abstract filter shape models, these filters have both represented and driven the state of progress in auditory research. Today, we are able to represent a wide range of linear and nonlinear aspects of the psychophysics and physiology of hearing with a rather simple and elegant set of circuits or computations that have a clear connection to underlying hydrodynamics and with parameters calibrated to human performance data. A key part of the progress in getting to this stage has been the experimental clarification of the nature of cochlear nonlinearities, and the modelling work to map these experimental results into the domain of circuits and systems. No matter how these models are built into machine-hearing systems, their bio-mimetic roots will remain key to their performance. In this paper we review some of these models, explain their advantages and disadvantages and present possible ways of implementing them. As an example, a continuous-time analogue CMOS implementation of the One Zero Gammatone Filter (OZGF) is presented together with its automatic gain control that models its level-dependent nonlinear behaviour.


IEEE Journal of Solid-state Circuits | 2009

A Biomimetic, 4.5

Andreas G. Katsiamis; Emmanuel M. Drakakis; Richard F. Lyon

This paper deals with the design and performance evaluation of a new analog CMOS cochlea channel of increased biorealism. The design implements a recently proposed transfer function, namely the One-Zero Gammatone filter (or OZGF), which provides a robust foundation for modeling a variety of auditory data such as realistic passband asymmetry, linear low-frequency tail and level-dependent gain. Moreover, the OZGF is attractive because it can be implemented efficiently in any technological medium-analog or digital-using standard building blocks. The channel was synthesized using novel, low-power, class-AB, log-domain, biquadratic filters employing MOS transistors operating in their weak inversion regime. Furthermore, the paper details the design of a new low-power automatic gain control circuit that adapts the gain of the channel according to the input signal strength, thereby extending significantly its input dynamic range. We evaluate the performance of a fourth-order OZGF channel (equivalent to an 8th-order cascaded filter structure) through both detailed simulations and measurements from a fabricated chip using the commercially available 0.35 mum AMS CMOS process. The whole system is tuned at 3 kHz, dissipates a mere 4.46 muW of static power, accommodates 124 dB (at < 5% THD) of input dynamic range at the center frequency and is set to provide up to 70 dB of amplification for small signals.


IEEE Transactions on Circuits and Systems | 2008

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Andreas G. Katsiamis; Konstantinos N. Glaros; Emmanuel M. Drakakis

The scope of this paper is to present certain insights and advances towards the synthesis and transistor-level implementation of high dynamic range (> 120 dB), micropower, CMOS Sinh companding filters. In particular, we present detailed technical insights on a recently proposed Sinh integrator which may serve as the basic building block for higher-order filter structures. The particular integrator exhibits a promising simulated linearity performance mainly because it does not rely on the complementarity of both N- and P-type MOS transistors to achieve its Class-AB operation. Rather, it is designed with single-type devices in its signal processing path. The integrator is evaluated through detailed simulation results obtained by performing both large-signal transient and periodic steady-state (PSS) analyses in Cadence IC Design Frameworkreg with the parameters of the commercially available AMS 0.35-mum CMOS process. SNR, SNDR, IP3 and mismatch are some of the performance figures reported in this work. A detailed head-to-head comparison with a typical pseudo-differential Class-AB Log-domain integrator, designed in the same technology and with identical specifications, is also performed in order to reveal any potential benefits of the Sinh circuit paradigm.


international symposium on circuits and systems | 2007

W, 120+ dB, Log-Domain Cochlea Channel With AGC

Andreas G. Katsiamis; Henry M. D. Ip; Emmanuel M. Drakakis

This paper outlines the design and simulated performance of a novel, current-mode, companding, Class-AB, Sinh lossy integrator. Prior Sinh filter designs utilize current conveyor-like blocks which incorporate both N- and P-type devices in alternate cascode arrangement to process the split-ted phases of the input. However, if these blocks were to be designed in weak inversion CMOS, the bulks of all the devices involved should be connected to their respective sources for accurate exponential/logarithmic conformity, which dictates the use of a triple-well process. Triple-well processes, apart from the fact that are not always available, have increased parasitics compared to twin-well ones, making the design and optimization of these already complicated filters a rather difficult one. In this paper, we present a new Sinh lossy integrator circuit that uses (either N- or) P-type devices rendering it to be practically realizable in any standard twin-well process. The circuit has been designed in 0.35mum AMS CMOS process with all simulation results obtained from Cadence Design Frameworkreg. The resulting lossy integrator exhibits a simulated input dynamic range greater than 120dB with only one integrating capacitor, while dissipating 0.3muW of power.


international midwest symposium on circuits and systems | 2006

Insights and Advances on the Design of CMOS Sinh Companding Filters

Andreas G. Katsiamis; Emmanuel M. Drakakis; Richard F. Lyon

The scope of this paper is to introduce two particular filter responses which closely resemble tuning curves at specific set of places on the basilar membrane (BM) of the biological cochlea. The responses are termed Differentiated All-Pole Gammatone Filter (DAPGF) and One-Zero Gammatone Filter (OZGF) and their form suggest their implementation by means of cascades of N identical two-pole systems, which makes them excellent candidates for efficient analog VLSI implementations. The resulting filters can be used in a filterbank architecture to realize cochlea implants or auditory processors of increased biorealism. In addition, their simple parameterization allows the use of conventional automatic gain control (AGC) schemes to model certain important features of the biological cochlea (e.g. level-dependent gain) that are observed physiologically. To illustrate the idea, we present preliminary simulation results from a 4th-order OZGF using novel high dynamic range log-domain biquads in CMOS weak inversion (CMOS-WI). All circuits were designed in Cadence® Design Framework, using the commercially available AMS 0.35¿m CMOS process. The reported OZGF structure has a simulated input dynamic range of 122.8dB, while dissipating 3.7¿W of static power.


Microelectronics Journal | 2013

A Practical CMOS Companding Sinh Lossy Integrator

Evdokia M. Kardoulaki; Konstantinos N. Glaros; Patrick Degenaar; Andreas G. Katsiamis; Henry Man D. Ip; Emmanuel M. Drakakis

This paper presents proof-of-concept measured results from CMOS hyperbolic-sine (sinh) filters fabricated in a commercially available 0.35?m CMOS technology. Results from two chips are reported: a practical sinh integrator and a high order (8th) notch filter dedicated to 50/60Hz noise rejection and synthesized by means of the proposed integrator. Linearity, frequency and noise measurements are reported. The notch frequency of the 8th order filter can be tuned over almost two decades. Its attenuation exceeds 70dB for the target frequency range of 20-60Hz and its dynamic range (for THD<4%) amounts to 89dB while consuming 8?W from a 2V power supply level. For an increased power consumption of 74?W its dynamic range (for THD<4%) exceeds 100dB.


international conference on microelectronics | 2009

Introducing the Differentiated All-Pole and One-Zero Gammatone Filter Responses and their Analog VLSI Log-domain Implementation

Evdokia M. Kardoulaki; Konstantinos N. Glaros; Andreas G. Katsiamis; Emmanuel M. Drakakis

Hyperbolic sine (Sinh) CMOS filters are of inherent class-AB nature and offer high dynamic range at half the total capacitance value when compared against their pseudodifferential class-AB log-domain counterparts. This characteristic renders their theoretical and practical study valuable. Only a very limited number of CMOS Sinh filter topologies have been reported in the literature to date mostly due to the considerably increased mathematical complexity associated with their design. This paper presents the transistorlevel synthesis and investigates in detail the performance of a 3rd-order Sinh CMOS 8Hz low-pass filter of Bessel approximation suitable for ECG processing. The filter is based on recent progress made and has been designed in the commercially available 0.35µm AMS process. Its static power consumption amounts to 0.1µW while its dynamic range exceeds 110dBs. The new filter exhibits a flat group delay of less than 1% error up to 6Hz and good variability performance verified by means of Monte Carlo simulations. The suitability of the filter as part of an ECG front-end is confirmed by the processing of artificially generated ECG signals contaminated by various simulated noise sources and fed as signal inputs into the Cadence Design Framework.


International Journal of Circuit Theory and Applications | 2014

Measured hyperbolic-sine (sinh) CMOS results

Evdokia M. Kardoulaki; Konstantinos N. Glaros; Andreas G. Katsiamis; Henry Man D. Ip; Emmanuel M. Drakakis

This paper advances the field of externally linear-internally nonlinear ELIN filters by introducing a synthesis method that enables the design of high-order class-AB sinh filters by means of complementary metal-oxide semiconductor CMOS weak-inversion sinh integrators comprising only one type of devices in their translinear loops. The proposed transistor-level synthesis approach is demonstrated through the examples of 1 a biquadratic and 2 a fifth-order filter, and their simulated performance is studied. The biquadratic filter achieves a dynamic range of 94dB and has a tunable quality factor Q up to the value of 8, whereas its natural frequency can be tuned for four orders of magnitude. Its static power consumption amounts to 6.2µW for Q=1 and fo=2kHz. The fifth-order Chebyshev sinh CMOS filter with a cut-off frequency of 100Hz, a pass band ripple of 1dB, and a power consumption of ~300nW is compared head-to-head with its pseudo-differential class-AB CMOS log domain counterpart. The sinh filter achieves similar or better signal-to-noise ratio SNR and signal-to-noise-plus-distortion ratio SNDR performances with half the capacitor area but at the expense of higher power consumption from the same power supply level. All three presented filter topologies are novel. Cadence design framework simulations have been performed using the commercially available 0.35µm AMS austriamicrosystems process parameters. Copyright


Archive | 2011

An 8Hz, 0.1µW, 110+ dBs Sinh CMOS Bessel filter for ECG signals

Andreas G. Katsiamis; Emmanuel M. Drakakis

For more than twenty-five years, the bionics community (and particularly the VLSI engineering community) has been performing extensive research to understand, model and design in silicon the biological auditory system and specifically the inner ear or cochlea. The aim of this on-going effort is not only towards building the ultimate artificial speech processor or implant, but also to develop systems that can contribute towards a deeper understanding of the underlying engineering strategies that nature chose to espouse. For these reasons, certain parts of the VLSI engineering community believe that trying to mimic certain biological operations will, in principle, yield systems that are somewhat closer to nature’s power-efficient computational ability. However, engineers must identify what they should and what they should not directly replicate in an artificial system inspired from biology. As for example, it does not make sense to create commercial aircraft wings to flap like those of birds (even though unmanned flapping-wing aircrafts are currently being developed – check NASA’s flapping solar aircraft) it is equally meaningful to argue that not all operations of the cochlea can or should be replicated in silicon in an exact manner. Abstractive operational or architectural simplifications dictated by logic and the available technology have been crucial for the successful implementation of useful hearing-type machines. Moreover, the biological cochlea is a threedimensional electro-hydro-mechanical system, whereas most electronic systems are onedimensional systems. Based on these thoughts, it would be wise to try and clarify three terms that are commonly used in the (bio-) engineering literature. Namely, these are: • Neuromorphic: the system level architecture is designed in such a way in order to replicate ‘exact’ basic anatomical identified operations which embody several key features encountered in the biological system. The term ‘neuromorphic’ was introduced by Carver Mead in (Mead, 1989;Mead, 1990) . • Bio-inspired: the design and/or operation are based on (inspired from) the engineering principles underlying its biological counterpart. • Biomimetic: the behaviour/operation/response resembles the one directly observed from the biological system, applying completely, partially or not at all the engineering principles encountered in the biological system. It should be therefore evident that a neuromorphic design is also bio-inspired and biomimetic, whereas a biomimetic (or bio-inspired) design is not necessarily neuromorphic. We shall provide tangible examples on this fact as the chapter unfolds.

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