Andreas Naderlinger

Model-Driven Development of FlexRay-Based Systems with the Timing Definition Language (TDL)

This paper argues that a logical specification of the timing behavior, which represents the core abstraction of the Timing Definition Language (TDL), is the key to significantly reduce the development, maintenance and integration costs of FlexRay-based systems. We measured a productivity gain by a factor of 20 and more with TDL compared to state-of-the-art FlexRay development methods and tools (see Section 1). We illustrate how TDL allows the platform-independent modeling of the timing and functional behavior, and how we accomplish the automatic platform mapping. An outlook sketches future research activities.

Poster Abstract: Towards Parallelizing Legacy Embedded Control Software Using the LET Programming Paradigm

Summary form only given. The growing demand for computing power in automotive applications can only be satisfied by embedded multi-core processors. Significant parts of such applications include OEM-owned legacy software, which has been developed for single-core platforms. While the OEM is faced with the issues of parallelizing the software and specifying the requirements to the ECU supplier, the latter has to deal with implementing the required parallelization within the integrated system. The Logical Execution Time (LET) paradigm addresses these concerns in a clear conceptual framework. We present here initial steps for applying the LET model in this respect. This work deals with the parallelization of a legacy electric powertrain coordinator software, by exploiting its existent inherent parallelism. The application software remains unchanged, as adaptations are only made to the middleware. The LET programming model is employed to ensure that the parallelized software has a correct functional and temporal behavior, while giving room for optimizing the parallelization. The Timing Definition Language (TDL) and associated tools are employed to specify LET-based requirements, and to generate system components that ensure LET behavior. While the runtime overhead of TDL components is still under evaluation, it is shown that the required buffer overhead can be kept small by a suitable choosing of LET values. The work describes two conceptual ways for integrating TDL components in AUTOSAR, by using either a complex device driver, or OS schedule tables. Next steps include a prototypical realization of the presented concepts, which will be done in a cooperation between OEM and suppliers. As evidence is gathered on the LET programming disciplines role as a facilitator of interaction between OEM and suppliers, we plan to further pursue LET standardization efforts in AUTOSAR.

Migration of legacy software towards correct-by-construction timing behavior

This paper presents an approach for incrementally adjusting the timing behavior of legacy real-time software according to explicit timing specifications expressed in the Timing Definition Language (TDL). The main goals of such a migration are ensuring predictability of the timing behavior, and enabling adaptivity of the system. The latter is particularly important for embedded control systems which adapt their computational load in accordance to parameters of the physical environment in which they operate. Our approach entails a minimal instrumentation of the original code combined with an automatically generated runtime system, which ensures that the executions of designated periodic computations in the legacy software satisfy the logical execution time specifications of the TDL model. The presented approach has been applied to a complex legacy controller system in the automotive domain.

Simulation of LET models in simulink and ptolemy

This paper describes two different approaches of simulating embedded control software whose real-time requirements are explicitly specified by means of the Logical Execution Time (LET) abstraction introduced in the Giotto project. As simulation environments we chose the black-box MATLAB/Simulink product and the open-source project Ptolemy II. The paper first sketches the modeling of LET-based components with the Timing Definition Language (TDL). As the LET abstraction allows the platform-independent modeling of the timing behavior of embedded software, a correct simulation of TDL components is equivalent to the behavior on a specific platform. We integrated TDL with both MATLAB/Simulink and Ptolemy and highlight the differences and similarities of the particular TDL simulation.

Simulating preemptive scheduling with timing-aware blocks in Simulink

This paper introduces an extension of the modeling and simulation environment MATLAB/Simulink. It enables control and system engineers to consider software execution times, as well as the effects of scheduling and preemption inside software-in-the-loop (SIL) simulations. To this end, we present the concept of a Simulink block whose execution lasts for a finite amount of simulation time. During this time, the simulation engine continues to update the plant or other blocks with outputs that have already been calculated by the block. Execution time information is assumed to be known (or based on some random distribution). Source-level annotating the control software with target specific timing information enables a finegrained and even a control-flow dependent simulation of the block. We outline the required synchronization with the simulation engine of Simulink. This timing-aware block consumes simulation time in the same sense as a task consumes CPU time on a target. We describe a mechanism to execute a set of such blocks with (potentially cyclic) data dependencies with a static priority scheduler inside Simulink, including support for preemption. The presented approach permits a development process, where a typical time invariant and platform agnostic model is incrementally transformed into a platform-specific one that makes the simulation more realistic.

Applying Real-Time Programming to Legacy Embedded Control Software

In the Logical Execution Time (LET) programming model, fixed execution times of software tasks are specified and a dedicated middleware is employed to ensure their realization, achieving increased system robustness and predictability. This paradigm has been proposed as a top-down development process, which is hardly applicable to a large body of legacy control software encountered in the embedded industry. Applying LET to legacy software entails challenges such as: satisfying legacy constraints, minimizing additional computational costs, maintaining control quality, and dealing with event-triggered computations. Such challenges are addressed here by a systematic approach, where program analysis and modification techniques are employed to introduce efficient buffering into the legacy system such that the given LET specifications are met. The approach has been implemented in a tool suite that performs fully automated transformation of the legacy software and may be carried out incrementally. This paper presents an application to large-scale automotive embedded software, as well as an evaluation of the achieved LET-based behavior for industrial engine control software.

A framework for command processing in Java/Swing programs based on the MVC pattern

We present a framework for command processing in Java/Swing programs based on the model-view-controller (MVC) pattern. In addition to standard approaches our framework supports (1) centralized exception handling, (2) premature command termination, (3) pre- and postprocessing of commands, (4) undo/redo based on event objects and model listeners, and (5) generic undo/redo commands. The framework has been applied successfully in a number of graphical editors as part of a tool chain for real time programming. It proved to increase the quality of the software by eliminating local exception handlers and by confining the impact of undo/redo to a small add-on to the model part of the application.

Efficient realization of logical execution times in legacy embedded software

The Logical Execution Time (LET) programming model has been recently employed as a parallel programming paradigm for multi-core platforms, in particular for porting large single-core applications to multi-core versions, which is a serious challenge faced in major industries, such as the automotive one. In this paper, we consider a transformation process from legacy single-core software to LET-based versions that are ready for multi-core, and focus on the problem of minimizing computational costs rooted in the additional buffering that is required to achieve the LET communication semantics, especially for parallel executions and in the presence of legacy event-driven functions that remain outside of the LET specifications. We propose a static analysis that proceeds top-down through successive layers of abstraction, where an optimal solution at a certain layer represents a minimal upper bound on the set of buffers determined in the next layer. We present a solution for the top layer, which is platform-independent and has no restrictions on executions of event-driven software. Furthermore, we derive optimal buffering for a second layer with a minimal platform configuration. We refer here to a three-layer implementation, which has been successfully applied to industrial automotive software, where further savings are achieved in the mapping from second layer buffers to memory locations. We also point to evaluation results, demonstrating the applicability of the approach in industrial settings.

Modeling and simulation of TDL applications

Most of the existing modeling tools and frameworks for embedded applications use levels of abstraction where execution and communication times of computational tasks are not captured. Thus, properties such as time and value determinism can be lost when refining the model closer to a target platform. The Logical Execution Time (LET) paradigm has been proposed to deal with this issue, by enabling specification of platform-independent execution times of periodic time-triggered computational tasks at higher levels of abstraction. This chapter deals with modeling and simulation of embedded applications where LET requirements are specified by using the Timing Definition Language (TDL). TDL provides a programming model for time-and event-triggered components suitable for large distributed systems. We present specific TDL extensions that increase the expressiveness of the language, accommodating the needs of control applications such as minimum sensor-actuator delays. We describe simulation of TDL programs in dataflow models (using Simulink) and discrete event (DE) models (using Ptolemy II). We show how the Ptolemy II based simulation can be used to validate preservation of timing and value behaviors when mapping a DE model of an application with concurrent components into a sequential implementation platform with fixed priority preemptive scheduling.