Andres I. Vila Casado

Multiple rate low-density parity-check codes with constant blocklength

This paper describes and analyzes low-density parity-check code families that support variety of different rates while maintaining the same fundamental decoder archi- tecture. Such families facilitate the decoding hardware design and implementation for applications that require communication at different rates, for example to adapt to changing channel conditions. Combining rows of the lowest-rate parity-check matrix produces the parity-check matrices for higher rates. An important advantage of this approach is that all effective code rates have the same blocklength. This approach is compatible with well known techniques that allow low-complexity encoding and parallel decoding of these LDPC codes. This technique also allows the design of programmable analog LDPC decoders. The proposed design method maintains good graphical properties and hence low error floors for all rates.

Multiple-rate low-density parity-check codes with constant blocklength

This paper describes and analyzes low-density parity-check code families that support variety of different rates while maintaining the same fundamental decoder architecture. Such families facilitate the decoding hardware design and implementation for applications that require communication at different rates, for example to adapt to changing channel conditions. Combining rows of the lowest-rate parity-check matrix produces the parity-check matrices for higher rates. An important advantage of this approach is that all effective code rates have the same blocklength. This approach is compatible with well known techniques that allow low-complexity encoding and parallel decoding of these LDPC codes. This technique also allows the design of programmable analog LDPC decoders. The proposed design method maintains good graphical properties and hence low error floors for all rates.

LDPC Decoders with Informed Dynamic Scheduling

Low-Density Parity-Check (LDPC) codes are usually decoded by running an iterative belief-propagation (BP), or message-passing, algorithm over the factor graph of the code. The traditional message-passing scheduling, called flooding, consists of updating all the variable nodes in the graph, using the same pre-update information, followed by updating all the check nodes of the graph, again, using the same pre-update information. Recently, several studies show that sequential scheduling, in which messages are generated using the latest available information, significantly improves the convergence speed in terms of number of iterations. Sequential scheduling introduces the problem of finding the best sequence of message updates. We propose Informed Dynamic Scheduling (IDS) strategies that select the message-passing schedule according to the observed rate of change of the messages. In general, IDS strategies require computation to select the message to update but converge in fewer message updates because they focus on the part of the graph that has not converged. Moreover, IDS yields a lower error-rate performance than either flooding or sequential scheduling because IDS strategies overcome traditional trapping-set errors. This paper presents IDS strategies that address several issues including performance for short-blocklength codes, complexity, and implementability.

Improving LDPC Decoders via Informed Dynamic Scheduling

Low-Density Parity-Check (LDPC) codes are usually decoded by running an iterative belief-propagation (BP), or message-passing, algorithm over the factor graph of the code. The message-passing schedule of the BP algorithm significantly affects the performance of the LDPC decoder. The authors recently presented a novel message-passing schedule, called Informed Dynamic Scheduling (IDS), that selects the message-passing schedule according to the observed rate of change of the messages. IDS yields a lower error-rate performance than traditional message-passing schedules (such as flooding and LBP) because it solves traditional trapping-set errors. However, for short-blocklength LDPC codes, IDS algorithms present non-trapping-set errors in the error floor region. This paper presents a careful analysis of those errors and proposes mixed scheduling strategies, combining LBP with IDS, that solve these non-trapping-set errors. Also, we will show that some lower-complexity techniques, such as mixed scheduling, perform close to the best IDS strategies for larger-blocklength codes.

Optimal Transmission Strategy and Explicit Capacity Region for Broadcast Z Channels

This paper provides an explicit expression for the capacity region of the two-user broadcast Z channel and proves that the optimal boundary can be achieved by independent encoding of each user. Specifically, the information messages corresponding to each user are encoded independently and the OR of these two encoded streams is transmitted. Nonlinear turbo codes that provide a controlled distribution of ones and zeros are used to demonstrate a low-complexity scheme that operates close to the optimal boundary.

CTH02-5: Non-linear Turbo Codes for Interleaver-Division Multiple Access on the OR Channel

This paper presents an interleaver-division multiple access (IDMA) based architecture with single-user decoding using parallel concatenated non-linear trellis codes (PC-NLTCs). These PC-NLTCs are designed specifically for the Z-Channel that arises in a multiple-user OR channel when each user treats the other users as noise. Over the OR multiple access channel (OR-MAC) single-user decoding permits operation at about 70% of the full multiple access channel sum capacity. In order to reach the sum capacity of the OR-MAC, these codes employ a ones density of much less than 50%. A union bound technique that predicts the performance of these codes under maximum- likelihood (ML) decoding is presented. The uniform interleaver analysis presented in this paper can be applied to any asymmetric channel, as long as an additive distance can be defined. Results for different numbers of users and a sum-rate of 60% are presented.

Trellis Codes with Low Ones Density for the OR Multiple Access Channel

This paper presents trellis codes for the Z channel designed to maintain a relatively low ones density. These codes have applications in pulse-position modulation systems and as a solution for uncoordinated communication on the binary OR multiple-access channel (MAC). In this paper we consider the latter application to demonstrate the performance of the codes. The OR channel provides an unusual opportunity where single-user decoding permits operation at about 70% of the full multiple-access channel sum capacity. The interleaver-division multiple access technique applied in this paper should approach that performance with turbo solutions. However, the current paper focuses on very low latency codes with simple decoding, intended for very high speed (gigabits per second) applications. Namely, it focuses on nonlinear trellis codes that provide about 30% of the full multiple-access sum capacity at high speeds and with very low latency. These trellis codes are designed specifically for the Z-channel that arises in a multiple-user OR channel, when the other users are treated as noise. In order to optimize the sum-capacity of the OR-MAC, the trellis code transmits codewords with a ones density much less than 50%. Also, a union bound technique that predicts the performance of these codes is presented. Results from simulations and a working FPGA implementation are shown

Optimal Transmission Strategy and Capacity Region for Broadcast Z Channels

This paper presents an optimal transmission strategy, with simple encoding and decoding, for the two-user broadcast Z channel. This paper provides an explicit-form expression for the capacity region and proves that the optimal surface can be achieved by independent encoding. Specifically, the information messages corresponding to each user are encoded independently and the OR of these two streams is transmitted. Nonlinear turbo codes that provide a controlled distribution of ones and zeros are used to demonstrate a low-complexity scheme that works close to the optimal surface.

Hamming codes are rate-efficient array codes

Array codes are error-correcting codes of very low complexity that were initially used for burst and erasure correction in redundant arrays of inexpensive disks (RAID) architectures and other storage applications. The structure of these codes allows a very simple encoding and decoding mechanism. Although they are very high-rate codes, they do not achieve the maximum possible rate given their design constraints. In fact Hamming codes maximize the possible rate given these design constraints. This paper compares the rate and complexity of array codes when compared to Hamming codes.

Demonstration of Uncoordinated Multiple Access in Optical Communications

Though it promises high bandwidths, the optical medium is not popular in local area networks. This is because current optical networks do not offer the ease of use and setup that an uncoordinated multiple access network such as Ethernet offers. In this paper, we propose a novel nonlinear trellis code designed for multiple access among uncoordinated nodes in an optical communications system. This code has been shown to have an efficiency of 30%. We have implemented the codes on Xilinx FPGAs for a 6 user optical system, transmitting data on a single wavelength. The above system was set up using commercial off-the-shelf components and we demonstrated BER <10-9of for three users, each running at a channel rate of 2 Gbps. Demonstration of this system required the design of new channel codes, architectural optimizations for the implementation of the channel codes for high speed with limited resources and electrical/optical optimizations to realize the optical channel.