Andrew J. Roscoe

Inertia Emulation Control Strategy for VSC-HVDC Transmission Systems

There is concern that the levels of inertia in power systems may decrease in the future, due to increased levels of energy being provided from renewable sources, which typically have little or no inertia. Voltage source converters (VSC) used in high voltage direct current (HVDC) transmission applications are often deliberately controlled in order to de-couple transients to prevent propagation of instability between interconnected systems. However, this can deny much needed support during transients that would otherwise be available from system inertia provided by rotating plant.

P and M Class Phasor Measurement Unit Algorithms Using Adaptive Cascaded Filters

The new standard C37.118.1 lays down strict performance limits for phasor measurement units (PMUs) under steady-state and dynamic conditions. Reference algorithms are also presented for the performance (P) and measurement (M) class PMUs. In this paper, the performance of these algorithms is analyzed during some key signal scenarios, particularly those of offnominal frequency, frequency ramps, and harmonic contamination. While it is found that total vector error (TVE) accuracy is relatively easy to achieve, the reference algorithm is not able to achieve a useful rate of change of frequency (ROCOF) accuracy. Instead, this paper presents alternative algorithms for P and M class PMUs, which use adaptive filtering techniques in real time up to 10-kHz sample rates, allowing consistent accuracy to be maintained across a ±33% frequency range. ROCOF errors can be reduced by factors of > 40 for P class and > 100 for M class devices.

Architecture of a Network-in-the-Loop Environment for Characterizing AC Power-System Behavior

This paper describes the method by which a large hardware-in-the-loop environment has been realized for three-phase ac power systems. The environment allows an entire laboratory power-network topology (generators, loads, controls, protection devices, and switches) to be placed in the loop of a large power-network simulation. The system is realized by using a real-time power-network simulator, which interacts with the hardware via the indirect control of a large synchronous generator and by measuring currents flowing from its terminals. These measured currents are injected into the simulation via current sources to close the loop. This paper describes the system architecture and, most importantly, the calibration methodologies which have been developed to overcome measurement and loop latencies. In particular, a new ¿phase advance¿ calibration removes the requirement to add unwanted components into the simulated network to compensate for loop delay. The results of early commissioning experiments are demonstrated. The present system performance limits under transient conditions (approximately 0.25 Hz/s and 30 V/s to contain peak phase- and voltage-tracking errors within 5° and 1%) are defined mainly by the controllability of the synchronous generator.

Tradeoffs Between AC Power Quality and DC Bus Ripple for 3-Phase 3-Wire Inverter-Connected Devices Within Microgrids

Visions of future power systems contain high penetrations of inverters which are used to convert power from dc (direct current) to ac (alternating current) or vice versa. The behavior of these devices is dependent upon the choice and implementation of the control algorithms. In particular, there is a tradeoff between dc bus ripple and ac power quality. This study examines the tradeoffs. Four control modes are examined. Mathematical derivations are used to predict the key implications of each control mode. Then, an inverter is studied both in simulation and in hardware at the 10 kVA scale, in different microgrid environments of grid impedance and power quality. It is found that voltage-drive mode provides the best ac power quality, but at the expense of high dc bus ripple. Sinusoidal current generation and dual-sequence controllers provide relatively low dc bus ripple and relatively small effects on power quality. High-bandwidth dc bus ripple minimization mode works well in environments of low grid impedance, but is highly unsuitable within higher impedance microgrid environments and/or at low switching frequencies. The findings also suggest that the certification procedures given by G5/4, P29 and IEEE 1547 are potentially not adequate to cover all applications and scenarios.

Exploring the Relative Performance of Frequency-Tracking and Fixed-Filter Phasor Measurement Unit Algorithms Under C37.118 Test Procedures, the Effects of Interharmonics, and Initial Attempts at Merging P-Class Response With M-Class Filtering

This paper presents improvements to frequency-tracking P-class and M-class phasor measurement unit (PMU) algorithms. The performance of these algorithms is tested in simulation against the reference (basic) algorithms from the C37.118 standard, using the formal test procedures specified in that standard. The measurements of total vector error (TVE), frequency and rate-of-change-of-frequency (ROCOF) are all investigated for compliance. Generally, TVE is found to be compliant for all algorithms. By contrast there are significant excursions for frequency and ROCOF measurements. More extreme nonstandard tests are also applied, involving multiple simultaneous interferences. The proposed algorithms exhibit improvements in frequency and ROCOF accuracy, with errors reduced by factors of up to 150 compared to the basic algorithms. A Hybrid P/M-class PMU is proposed and demonstrated, offering P-class response to dynamic steps but M-class steady-state accuracy. However, setting usable trigger thresholds for this device requires a thorough investigation of interharmonic effects on P-class PMUs. This investigation poses more questions than it answers, leading to a questioning of the validity of any frequency or ROCOF measurement from any P-class PMU.

Large finite array analysis using infinite array data

The prediction of edge element behavior is a common problem during the design of large array antennas. The performance of the center elements can be approximated by an infinite array model, but the edge element patterns and active reflection coefficients cannot. The full element-by-element analysis of a large finite array is either excessively time consuming or impossible due to the computer power required. A study has recently been carried out to develop and test methods of fully predicting large array performance using infinite array data. The methods devised are presented, together with comparisons of predicted performance and measured data from a 163-element WG-16 array. >

Comparison of multiple power amplification types for power Hardware-in-the-Loop applications

This Paper discusses Power Hardware-in-the-Loop simulations from an important point of view: an intrinsic and integral part of PHIL simulation - the power amplification. In various publications PHIL is discussed either in a very theoretical approach or it is briefly featured as the used method. In neither of these publication types the impact of the power amplification to the total PHIL simulation is discussed deeply. This paper extends this discussion into the comparison of three different power amplification units and their usability for PHIL simulations. Finally in the conclusion it is discussed which type of power amplification is best for which type of PHIL experiment.

Methodology for testing loss of mains detection algorithms for microgrids and distributed generation using real-time power hardware-in-the-loop based technique

The effective integration of distributed energy resources in distribution networks demands powerful simulation and test methods in order to determine both system and component behaviour, and understand their interaction. Unexpected disconnection of a significant volume of distributed generation (DG) could have potentially serious consequences for the wider power system, and this means DG sources can no longer be treated as purely negative load. This paper proposes a method of testing loss-of-mains (LOM) detection and protection schemes for distributed energy resources (DER) using realtime power hardware-in-the-loop (RT PHIL). The approach involves connecting the generator and interface under test (e.g. motor-generator set or inverter, controlled by an RTS — Real Time Station) to a real-time simulator (in this case an RTDS — Real Time Digital Simulator) which simulates the local loads and upstream power system. This arrangement allows observation of the interaction with other controls in the network beyond the local microgrid area. These LOM detection schemes are of increasing importance because with growing penetration levels of distributed generation the network operator has less visibility and control of the connected generation. Furthermore when the generation and load in a particular network area are closely matched (e.g. a grid-connected microgrid), it becomes increasingly difficult to detect a loss of grid supply at the generator. This work builds upon the existing LOM testing methodology developed previously for the Energy Networks Association in the United Kingdom. By utilising RT PHIL and a laboratory microgrid, the testing environment has been brought to a new level of functionality where system integrity can be more rigorously and realistically evaluated.

A new control method for the power interface in power hardware-in-the-loop simulation to compensate for the time delay

In an attempt to create a new control method for the power interface in PHIL simulations, a simulated PHIL simulation is carried out where the simulation and hardware part are modelled in MATLAB/Simulink along with the new control method. This power interface control is proposed to achieve high accuracy in PHIL simulation with closed-loop control for aerospace, marine or micro grid applications. Rather than analyzing the Real Time Simulator (RTS) data and controlling the interface using time-domain resonant controllers, the RTS data will be analyzed and controlled at the interface in the frequency domain, on a harmonic-by-harmonic and phase-by-phase basis. This should allow the RTS time delay to be compensated accurately, and removes the requirement to include additional components to compensate for the simulation delay into the simulated power system as it is not appropriate for power systems which have short transmission lines. This is extremely relevant for marine and micro grid scenarios where such inductive components may not be present.

Avoiding the Non-Detection Zone of Passive Loss-of-Mains (Islanding) Relays for Synchronous Generation by Using Low Bandwidth Control Loops and Controlled Reactive Power Mismatches

Generation connected to electrical distribution systems requires reliable and timely detection of loss-of-mains (islanding). Passive loss-of-mains detection relays typically use measurements of parameters such as frequency, phase, and the magnitudes of voltage and current. If a part of the power network becomes islanded and there is a very close match between generation and demand of both active and reactive power, there is a risk that the relay will not be able to detect the loss-of-mains (LOM) event quickly, or perhaps at all. This is the “non-detection zone” or NDZ. This paper proposes a combination of 2 generator control techniques which allow the NDZ to be avoided even when the generator has significant inertia. Firstly, the natural instability (when islanded) of a grid-connected control scheme consisting of integral and droop controls is recognized and exploited. Secondly, a simple strategy is added which makes occasional small, steady-state adjustments to the reactive power output of the generator. The scheme has been tested in the laboratory and shows that the 2 second detection time required by IEEE 1547 can be achieved, even when an exact match of active power generation and demand is initially configured, and the generator has a significant inertia.