Andrew J. Tickle

Feasibility of a portable morphological scene change detection security system for field programmable gate arrays (FPGA)

In this paper, there is an investigation into the possibility of executing a Morphological Scene Change Detection (MSCD) system on a Field Programmable Gate Array (FPGA), which would allow its set up in virtually any location, with its purpose to detect intruders and raise an alarm to call security personal, and a signal to initial a lockdown of the local area. This paper will include how the system was scaled down from the full building multi-computer system, to an FPGA without losing any functionality using Alteras DSP Builder development tool. Also included is the analysis of the different situations which the system would encounter in the field, and their respective alarm triggering levels, these include indoors, outdoors, close-up, distance, high-brightness, low-light, bad weather, etc. The triggering mechanism is a pixel counter and threshold system, and its adaptive design will be included. All the results shown in this paper, will also be verified by MATLAB m-files running on a full desktop PC, to show that the results obtained from the FPGA based system are accurate.

Collaborative reflections on using island maps to express new lecturers’ academic identity

New lecturers may find the notion of academic identity difficult to grasp, yet it potentially provides them with a means of revealing issues of self, career and work-life balance. In this paper, we introduce an innovative research strategy and democratic research framework which have enabled us to explore new lecturers’ academic identities in self-revelatory ways. This collaborative inquiry was undertaken by two teaching staff and four former students of a postgraduate certificate in higher education professional practice at a UK post-92 university. Through our innovative research strategy, one’s academic identity is conceptualised as the map of an island featuring actual or potential personal characteristics, qualities and interests. The visual metaphors and clustering of these attributes, together with individuals’ reflective commentaries on creating their own academic identity maps, lead us tentatively to characterise four alternative expressions of identity: the multifaceted whole, the layered self, the interlinked self and the fragmented self.

Applications of a morphological scene change detection (MSCD) for visual leak and failure identification in process and chemical engineering

Morphological Scene Change Detection (MSCD) is a process typically tasked at detecting relevant changes in a guarded environment for security applications. This can be implemented on a Field Programmable Gate Array (FPGA) by a combination of binary differences based around exclusive-OR (XOR) gates, mathematical morphology and a crucial threshold setting. The additional ability to set up the system in virtually any location due to the FPGA makes it ideal for insertion into an autonomous mobile robot for patrol duties. However, security is not the only potential of this robust algorithm. This paper details how such a system can be used for the detection of leaks in piping for use in the process and chemical industries and could be deployed as stated in the above manner. The test substance in this work was water, which was pumped either as a liquid or as low pressure steam through a simple pipe configuration with holes at set points to simulate the leaks. These holes were situated randomly at either the center of a pipe (in order to simulate an impact to it) or at a joint or corner (to simulate a failed weld). Imagery of the resultant leaks, which were visualised as drips or the accumulation of steam, which where analysed using MATLAB to determine their pixel volume in order to calibrate the trigger for the MSCD. The triggering mechanism is adaptive to make it possible in theory for the type of leak to be determined by the number of pixels in the threshold of the image and a numerical output signal to state which of the leak situations is being observed. The system was designed using the DSP Builder package from Altera so that its graphical nature is easily comprehensible to the non-embedded system designer. Furthermore, all the data from the DSP Builder simulation underwent verification against MATLAB comparisons using the image processing toolbox in order to validate the results.

Simulation of a dead reckoning embedded system security patrol robot for deployment inside structures and buildings

Dead Reckoning (DR) is the process of estimating a robots current position based upon a previously determined position, and advancing that position based upon known speed and direction over time. It is therefore a simple way for an autonomous mobile robot to navigation within a known environment such as a building where measurements have been taken and a predetermined route planned based upon which doors (or areas) the robot would have enough force to enter. Discussed here is the design of a DR navigation system in Alteras DSP Builder graphical design process. The wheel circumference to the step size of stepper motor used to drive the robot are related and so this ratio can be easily changed to easily accommodate changes to the physical design of a robot with minimal changes to the software. The robot calculates its position in relation to the DR map by means of the number of revolutions of the wheels via odometry, in this situation there is no assumed wheel slippage that would induce an accumulative error in the system overtime. The navigation works by using a series of counters, each corresponding to a measurement taken from the environment, and are controlled by a master counter to trigger the correct counter at the appropriate time given the position of robot in the DR map. Each counter has extra safeguards built into them on their enables and outputs to ensure they only count at the correct time and to avoid clashes within the system. The accuracy of the navigation is discussed after the virtual route is plotted in MATLAB as a visual record in addition to how feedback loops, identification of known objects (such as fire safety doors that it would navigate through), and visual object avoidance could later be added to augment the system. The advantages of such a system are that it has the potential to upload different DR maps so that the end robot for can be used in new environments easily.

Upgrading to a soft multifunctional image processor for implementation on a field programmable gate array with additional biasing and logical capabilities

In this paper, there are details of the continuation of the development of the previously designed multifunctional morphological system and a description of how the system has been upgraded by including soft morphological operators as their ability to compensate for noise by varying the k-value of the system and how this is of great importance in image processing. This paper will cover the details of the upgrade process to include a greater number of logical functions than its predecessor, how a biasing system was included to brighten or dim a certain quadrant of the image or the entire image, how images are combined in either a product, mathematical or logical block and finally how the control mechanism is interfaced so that there are no signal clashes and that complicated strings of possibly many merged or biased images can be processed and outputted. The testing process will be discussed where each layer is tested for k-value and extra operations which are then compared to MATLAB test images from the Image Processing Toolbox or hand written m-files as a basis for comparison. The paper will also include how certain areas have been made more efficient to make the system faster and to reduce space on the FPGA by reducing the number of convolution kernels compared to the latter.

Morphology based radon processed neural network for transmission line fault detection

A novel method for classifying transmission line faults is presented in this paper. Mathematical morphology is applied along with radon transform for extracting features needed for fault classification. The features are trained with radial basis network for fault detection. In the present work an HVDC transmission line which is divided into three zones is taken as the work background. Detailed simulation results are shown. The present methodology for fault detection is fast, and the use of morphology operator along with radon transform, reduces the computational complexity compared with other conventional methods in fault detection.

Feasibility of an encryption and decryption system for messages and images using a Field Programmable Gate Array (FPGA) as the portable encryption key platform

In this paper, we discuss a Field Programmable Gate Array (FPGA) implementation of steganography for security applications such as anti-theft systems and forensic investigation systems. Our proposed method takes advantage of both conventional encryption/decryption algorithms and fragile image watermarking techniques to provide user-friendly interface. It could potentially be of benefit to financial investment companies, the military and security forces in order to keep certain information hidden within other content with a change so subtle that no one who does not know exactly where or how to look will not be able to obtain the data. In our proposed system, a steganographic message known as plaintext is first encrypted by conventional methods to give an extra layer of security, producing a ciphertext. The steganographic message can be either an image or ASCII text, both of which will be discussed. Then, the cover text or image is modified to contain the ciphertext, yielding a encrypted text or a watermarked image. Details of the circuitry for each stage are given with some of the encryption and randomization circuitry not included in full detail for commercial reasons. Test images before and after watermarking will be shown to demonstrate the validity and effectiveness of the proposed system.

Development and simulation of soft morphological operators for a field programmable gate array

Abstract. In image processing applications, soft mathematical morphology (MM) can be employed for both binary and grayscale systems and is derived from set theory. Soft MM techniques have improved behavior over standard morphological operations in noisy environments, as they can preserve small details within an image. This makes them suitable for use in image processing applications on portable field programmable gate arrays for tasks such as robotics and security. We explain how the systems were developed using Altera’s DSP Builder in order to provide optimized code for the many different devices currently on the market. Also included is how the circuits can be inserted and combined with previously developed work in order to increase their functionality. The testing procedures involved loading different images into these systems and analyzing the outputs against matlab-generated validation images. A set of soft morphological operations are described, which can then be applied to various tasks and easily modified in size via altering the line buffer settings inside the system to accommodate a range of image attributes ranging from image sizes such as 320×240  pixels for basic webcam imagery up to high quality 4000×4000  pixel images for military applications.

Morphological scene change detection for night time security

Morphological Scene Change Detection (MSCD) systems can be used to secure environments by sensing potential intruders and alerting security personnel to any security risks. To achieve this, the system compares the input from a camera to a reference image quantifying the level of change between the images, raising the alarm if this change is greater than a set triggering level. Morphological operators are than used to reduce the effect of any image change not related to a potential security risk; this includes noise and other minor changes thus decreasing the risk of false alarms. However in low light conditions MSCD systems can fail due to the reduced intensity differences between images containing security threats and reference images. This paper documents a proof of concept for a system that would use night vision images to address this problem. Here a low light scope camera attachment is used in place of a night vision camera and shows modifications to the previous MSCD system, which improves the performance when used with night vision images. The analysis of the modified system’s performance in different low light environments, this includes analysis of appropriate binary threshold and alarm triggering levels for a range of environments. The latter includes indoors at a distance, indoors at close range, outdoors at a distance and outdoors at close range. The results shown demonstrate that MSCD systems operating in low light conditions have the potential to be used as a useful tool in a security system and are compared to the original to demonstrate the improvement.

Integration of a digital watermarking system into a Morphological Scene Change Detector (MSCD) for tamper prevention and detection

Digital image watermarking is the process of embedding information into a digital image which may be used to verify its authenticity or the identity of its owners. This is the same as paper bearing a watermark for visible identification such as in money for example. In digital watermarking, if the signal is copied, then the information also is carried in the copy, proving that the data has been copied. In this paper, a digital watermarking approach is investigated using the DSP Builder methodology in order to provide the Morphological Scene Change Detector (MSCD) with a means by which if it detects an intruder, a watermarked copy of the triggering image is produced. This is so that if the image is required as proof in a court case; it can help show that the image has not been tampered with by means of the watermark. The system uses an 8-bit greyscale image and maps a binary watermark image onto the lowest bit level; this is then used when the MSCD is triggered. For simplicity in this case, the watermark image is the same size and the target image to be watermarked, future variations with foresee a variable watermark image size. The result will be a watermarked image that if a section is copied and pasted into another file and that file is then analysed, the watermark will be visible. The process of integrating the watermarking process into the MSCD will also be discussed as this system originally used binary images to speed up the process. Finally, this watermark system can be used with any system designed as all that is required is to insert the sub-system into a larger system meaning that it is extremely interchangeable. Keywords: Digital Watermarking, Scene Change Detection, FPGA, DSP Builder.