Andrew Kwan

An Accurate Complexity-Reduced “PLUME” Model for Behavioral Modeling and Digital Predistortion of RF Power Amplifiers

This paper introduces a new, accurate, and complexity-reduced three-nonlinear-box model that is suitable for the behavioral modeling and digital predistortion (DPD) of power amplifiers (PAs) exhibiting memory effects. This model is composed of a look-up table (LUT), a memory polynomial (MP), and an envelope MP (EMP), which are all connected in parallel, and it is termed as Parallel-LUT-MP-EMP (PLUME). The PLUME models performance is experimentally assessed using a highly nonlinear Doherty PA driven by a multicarrier wideband code division multiple access signal. A comparison is held between the PLUME model and different state-of-the-art models reported in the literature, such as the MP model, the parallel twin nonlinear two-box model, and the generalized MP (GMP) model. The experimental results, in both behavioral modeling and DPD applications, demonstrate that the proposed PLUME model outperforms the first two models. However, it shows the same accuracy as the GMP model but with an approximately 45% reduction in the number of coefficients. This significant decrease in coefficients considerably reduces the model computational complexity. Another comparison of the resources utilized for field programmable gate array implementation of the PLUME model and the GMP model is performed, which reveals that the PLUME model uses much fewer resources than the other model.

Linearization of Concurrent Tri-Band Transmitters Using 3-D Phase-Aligned Pruned Volterra Model

This paper reports a novel digital predistortion (DPD) scheme for concurrent tri-band power amplifiers (PAs). The proposed tri-band DPD is based on a pruned Volterra model that takes into account the impact of the phase distortion observed in multi-band PAs as well as the compound amplitude distortion. By taking into account the phase variation effects across a wide frequency band, the proposed 3-D phase-aligned Volterra DPD can effectively compensate for the crosstalk effects between the fundamental frequencies, their harmonics, and intermodulation products due to the nonlinearity the tri-band PA exhibited. The performance of the proposed DPD is validated using a broadband Class-AB PA driven concurrently by three independent carrier-aggregated long-term evolution signals at separation frequencies around 100 MHz. The measurement results validate the accurate performance of the proposed 3-D phase-aligned pruned Volterra DPD in suppressing the in-band and cross-band intermodulation effects, and shows improvement over a basic 3-D tri-band DPD model that neglects phase variation effects across frequency.

Subsampling Feedback Loop Applicable to Concurrent Dual-Band Linearization Architecture

This paper demonstrates an energy-efficient and low-complexity subsampling receiver adopted in the feedback loop of the dual-band power amplifier (PA) linearization architecture. The challenges and issues on finding the valid subsampling frequencies in nonlinear system are discussed, and a systematic approach for finding valid subsampling frequencies is presented. The subsampling-based receiver is applied as a proper solution for the feedback loop of the dual-band linearization architecture. It is shown that the subsampling feedback loop reduces the complexity and the cost of the dual-band linearization architecture. The simulation and measurement results show the proper functionality of the presented technique and demonstrate a good linearization performance. The measurement results show that when using this method, more than 15-dB improvement in normalized mean squared error and more than 17-dB improvement in adjacent channel power ratio are achieved for a wideband class-AB PA, compared with the unlinearized method.

Digital Predistortion of LTE-A Power Amplifiers Using Compressed-Sampling-Based Unstructured Pruning of Volterra Series

This paper presents a method for pruning power amplifier (PA) behavioral models and digital predistorters based on compressed sampling theory. Using this method, the number of coefficients required by behavioral models and predistorters can be significantly reduced while achieving comparable performance in terms of both modeling accuracy and suppressing distortions. Hardware measurements obtained for a Doherty PA driven by a five-carrier 100-MHz wide long-term evolution-advanced signal demonstrate the capability of the proposed method to linearize a highly nonlinear PA prototype using a minimal number of coefficients, revealing the attractive properties of the proposed method and its desirable performance. Using the proposed technique, predistorters achieving similar linearization performance while requiring significantly less coefficients than the traditional models were demonstrated.

A Digital Predistortion System with Extended Correction Bandwidth with Application to LTE- A Nonlinear Power Amplifiers

This article presents a bandwidth extended digital predistortion system suitable for LTE-advanced applications. The proposed predistortion system uses a two-box architecture based on the cascade of a memory polynomial followed by a memoryless predistortion function. The memoryless predistorter is identified offline and used to perform a coarse linearization which cancels out most of the static nonlinearity of the device under test allowing for a reduced observation bandwidth for the synthesis of the memory polynomial predistortion sub-function. The proposed predistorter was experimentally validated and its performance benchmarked against a predistorter having the same structure but identified using the conventional approach. The measurement results demonstrate that the proposed predistorter requires 30% less sampling speed for the analog to digital converter of the feedback path.

E-TDD – embedded test driven development a tool for hardware-software co-design projects

Test driven development (TDD) is one of the key Agile practices. A version of CppUnitLite was modified to meet the memory and speed constraints present on self-contained, high performance, digital signal processing (DSP) systems. The specific characteristics of DSP systems required that the concept of refactoring be extended to include concepts such as “refactoring for speed”. We provide an experience report describing the instructor-related advantages of introducing an embedded test driven development tool E-TDD into third and fourth year undergraduate Computer Engineering Hardware-Software Co-design Laboratories. The TDD format permitted customer (instructor) hardware and software tests to be specified as “targets” so that the requirements for the components and full project were known “up-front”. Details of CppUnitLit extensions necessary to permit tests specific for a small hardware-software co-design project, and lessons learnt when using the current E-TDD tool, are given. The next stage is to explore the use of the tool in an industrial context of a video project using the hybrid communication-media (HCM) dual core Analog Devices ADSP-BF561 Blackfin processor.

Three-Dimensional digital predistorter for concurrent tri-band power amplifier linearization

This paper reports a novel digital predistortion (DPD) scheme for concurrent tri-band power amplifier (PA). The proposed three-dimensional tri-band DPD is based on the analysis of crosstalk between the fundamental frequencies, their harmonics and intermodulation products due to the nonlinearity exhibited by the tri-band PA. The DPD performance is validated using a broadband PA driven concurrently with LTE, WIMAX, and WCDMA signals centered at 2.14 GHz, 2.425 GHz, and 2.655 GHz, respectively.

Bandwidth and Power Scalable Digital Predistorter for Compensating Dynamic Distortions in RF Power Amplifiers

In this paper, a bandwidth and power scalable digital predistortion architecture is proposed for the linearization of power amplifiers (PA) exhibiting memory effects. The proposed digital predistorter allows for low complexity update following changes in the signals bandwidth and/or power level. Experimental validation carried on a 300-W Doherty PA shows that the scalable predistorter architecture achieves similar performance as its conventional counterpart. However, the proposed predistorter requires the update of up to 50% less coefficients than the conventional predistorter.

Concurrent dual band digital predistortion using look up tables with variable depths

A concurrent dual band predistorter implementation using look up tables is presented in this paper. The power amplifier introduces the main source of nonlinearity in a transmitter chain; and the distortion is further enhanced when sending signals in multiple carrier frequencies. Using a dual band predistorter based on a memory polynomial model allows for the compensation of these nonlinearities by taking into account both signals. Converting the coefficients to look up tables reduces the number of arithmetic operations needed in a signal processor. Results are presented with the conventional dual band predistorter and the look up table predistorter in operating bands 880 MHz and 2140 MHz, showing the linearization capability and accuracy with the proposed implementation agrees with the conventional predistorter.

Performance-Driven Dimension Estimation of Memory Polynomial Behavioral Models for Wireless Transmitters and Power Amplifiers

A novel approach is proposed for automated dimension estimation in memory polynomial based power ampliflers/transmitters behavioral models. This method consists of successively identifying the static nonlinearity order and memory depth of the model in accordance with a predeflned performance criterion. The proposed method is validated using a 3G Doherty power amplifler driven by various WCDMA signals. Experimental results demonstrate the robustness of the proposed successive sweep approach compared to the conventional blind simultaneous sweep approach. The proposed dimension estimation method is an enabling tool for e-cient design optimization of power ampliflers circuits to enhance their linearizability.