Anthony S. Deese

Emulation of power system load dynamic behavior through reconfigurable analog circuits

Emulation of power system dynamic load behavior is a viable alternative to popular simulation methods. In this paper, a circuit designed to emulate the dynamic behavior of power system loads is presented. It is constructed from common analog components and is fully reconfigurable via a set of analog input signals. As load behavior is heavily dependent on that of the external network, it is important to demonstrate how this reconfigurable analog load emulation module (RALEM) may be utilized in dynamic power flow studies. Such a demonstration is presented. These studies provide the networks transient and steady-state flow of power in real-time or faster. This is of importance as popular simulation methods cannot provide a solution with such speed

Power system on a chip (PSoC): analog emulation for power system applications

This contribution addresses VLSI-based hardware analog emulators of power systems. The goal is to develop a computational tool we refer to as a power system on a chip (PSoC). We review various problems and proposed solutions encountered from the design stage to the PC-board hardware implementation stage and finally to the anticipated VLSI implementation stage. In addition to various characteristic features, it has already been noted that using analog emulation for power system analysis allows for reduction in computation time, without significant loss in accuracy, compared to numerical methods. We further validate this through observations obtained from comparative runs between software and analog hardware environments

A Distribution Power Flow Experiment for Outreach Education

This paper presents a distribution power flow experiment for use in outreach education. The work was adapted from an existing power flow experiment by Yang et al. to target non-engineers with diverse educational backgrounds. Critical educational outcomes were identified. An iterative design process was developed to build the experiment. Subsequently, new laboratory activities and interactive manuals were created. Assessment surveys were designed for evaluation purposes. Feedback results from 26 participants are presented.

Utilization of FPAA Technology for Emulation of Multiscale Power System Dynamics in Smart Grids

In this paper, the authors address computational issues associated with implementation of VLSI technologies-specifically, the utilization of field programmable analog array (FPAA) technology to analyze the steady-state as well dynamic behavior of nonlinear, multiscale power systems. Emphasis is placed on the following issues: adaptation of FPAA hardware for power flow analyses, design and construction of physical prototype, optimal hardware scaling, and application of emulation to transient fault analyses.

Effect of Size on Analog Circuit Based Emulation of Steady-State Power System Behavior

This paper further examines the use of analog circuit based emulation to study the behavior of multi-bus power systems, specifically the effect of power system size on the hardware design and performance. The goal is to demonstrate that these effects are minimal and analysis of large power systems through emulation methods is not only a viable but favorable alternative to popular simulation methods.

Power system on a chip (PSoC)

This paper addresses modeling issues behind the development of a hardware analog emulator of power system behavior referred to as a power system on a chip (PSoC). The paper reviews various problems and proposed solutions encountered from the design stage to PC-board hardware implementation to anticipated VLSI implementation. It has already been noted that using analog emulation for power system analysis allows for reduction in computation time, without significant loss in accuracy, compared to numerical methods. This is further validated in this paper through observations obtained from comparative runs between software and analog hardware environments

Development of Smart Electric Power System (SEPS) Laboratory for Advanced Research and Undergraduate Education

In this work, the author discusses development of the Smart Electric Power System (SEPS) Laboratory at The College of New Jersey (TCNJ). The fully reconfigurable six-bus, three-phase power system hardware operates with ratings of 208VLL; (at 60 Hz) and 0.2 kW. It is composed of various synchronous generators with associated prime movers, induction motors with associated dynamometers, transformers, transmission lines, contactors, constant-impedance loads, renewable generation-emulator modules, battery storage devices, and appropriate power electronic converters. The SEPS lab significantly expands the ability of faculty and students at TCNJ to study energy problems, providing a sound foundation for the institutions small but growing power engineering program. The National Science Foundation Major Research Instrumentation Program provided external funding for the hardware.

Design and Testing of Custom FPAA Hardware With Improved Scalability for Emulation of Smart Grids

In this paper, the authors present work in the field of analog emulation of electric power system dynamics via field-programmable analog array (FPAA) technology. Specifically, they discuss development of a new emulation tool with increased modularity and operator density for analysis of larger power systems and smart grids. One innovative aspect of this work is the fact that it employs custom FPAA boards developed by researchers at The College of New Jersey and Drexel University. The work places emphasis on decreased prototype size, increased density of computational analog blocks (CABs), more effective FPAA interconnection scheme, and batch-mode FPAA configuration.

Circuit Theoretical Analysis of Reconfigurable Analog Load Emulation Circuit

This paper further analyzes the operation of a reconfigurable analog circuit designed to mimic the dynamic behavior of power system loads. The authors focus on the non-linear behavior of the circuit and its effect on its stability. This work is important to understanding the operation of the circuit under stressed conditions such as those that occurs during transient periods.

Development of Smart Electric Power System (SEPS) Laboratory at The College of New Jersey

This work discusses the need for power engineering laboratory facilities at smaller colleges and universities, especially those that focus on undergraduate education. The author also discusses his experience developing the Smart Electric Power System (SEPS) Laboratory at The College of New Jersey. The fully-reconfigurable six-bus, three-phase power system hardware operates with ratings of 60Hz, 208VLL, and 0.2kW. It is composed of various synchronous generators with associated prime movers, induction motors with associated dynamometers, transformers, transmission lines, contactors, constant-impedance loads, renewable generation-emulator modules, battery storage devices, and appropriate power electronic converters. The SEPS lab significantly expands the ability of faculty and students at TCNJ to study energy problems, providing a good foundation for the institutions small but growing power engineering program.