Anton Korniienko

All-digital PLL array provides reliable distributed clock for SOCs

This brief addresses the problem of clock generation and distribution in globally synchronous locally synchronous chips. A novel architecture of clock generation based on network of coupled all-digital PLLs is proposed. Solutions are proposed to overcome the issues of stability and undesirable synchronized modes (modelocks) of high-order bidirectional PLL networks. The VLSI implementation of the network is discussed in CMOS65 nm technology and the simulation results prove the reliability of the global synchronization by the proposed method.

A clock network of distributed ADPLLs using an asymmetric comparison strategy

In this paper, we describe an architecture of a distributed ADPLL (All Digitall Phase Lock Loop) network based on bang-bang phase detectors that are interconnected asymmetrically. It allows an automatic selection between two operating modes (uni- and bidirectional) to avoid mode-locking phenomenon, to accelerate the network convergence and to improve the robustness to possible network failures in comparison to simple unidirectional mode.

Distributed clock generator for synchronous SoC using ADPLL network

This paper presents a novel architecture of on-chip clock generation employing a network of oscillators synchronized by the distributed all-digital PLLs (ADPLLs). The implemented prototype has 16 clocking domains operating synchronously in a frequency range of 1.1-2.4 GHz. The synchronization error between the neighboring clock domains is less than 60 ps. The fully digital architecture of the generation offers flexibility and efficient synchronization control suitable for use in synchronous SoCs.

Embedding of Uncertainty Propagation: Application to Hierarchical Performance Analysis

The article proposes an approach to embed the propagation of structured uncertainty through a system in a system with one unstructured uncertainty. This embedding is interesting as it allows to use the classical analysis and design tools such H∞ design and μ-analysis or synthesis. A strong motivation is to improve the computational efficiency of the analysis for large-scale uncertain systems using a hierarchical approach. Examples are provided for both the embedding in the SISO and MIMO cases and for the hierarchical performance analysis of an uncertain Phase-Locked-Loop network.

A design approach for networks of Self-Sampled All-Digital Phase-Locked Loops

This paper addresses the problem of the stability and the performance analysis of N-nodes cartesian networks of self-sampled all digital phase-locked loops. It can be demonstrated that under certain conditions (such as proper filter coefficient values), a global and a local synchronization can be obtained. Our approach to find the optimal conditions consists of analyzing a corresponding linear average system of the cartesian network rather than constructing a piecewise-linear system which is extremely difficult to analyse. The constructed corresponding system takes into account the non-linearity of the network and especially the self-sampling property. It is then analyzed by linear performance criteria such as modulus margin to guarantee a robust stability of the cartesian network. The reliability of our approach is proved by transient simulations in networks of different sizes.

An H∞-based approach for robust sensor localization

In this paper, we consider the problem of sensor localization, i.e., finding the positions of an arbitrary number of sensors located in a Euclidean space, ℝm, given at least m+1 anchors with known locations. Assuming that each sensor knows pairwise distances in its neighborhood and that the sensors lie in the convex hull of the anchors, we provide a DIstributed LOCalization algorithm in Continuous-Time, named DILOCCT, that converges to the sensor locations. This representation is linear and is further decoupled in the coordinates. By adding a proportional controller in the feed-forward loop of each location estimator, we show that the convergence speed of DILOC-CT can be made arbitrarily fast. Since a large gain may result into unwanted transients especially in the presence of disturbance introduced, e.g., by communication noise in the network, we use H∞ theory to design local controllers that guarantee certain global performance while maintaining the desired steady-state. Simulations are provided to illustrate the concepts described in this paper.

Phase IQC for the hierarchical performance analysis of uncertain large scale systems

This paper investigates the performance analysis of uncertain large scale systems. Due to their complexity, the usual robustness analysis methods based on e.g: μ or Integral Quadratic Constraints (IQC) cannot be practically applied. In order to address this problem, in [1], we propose to represent a large scale system as an interconnection of sub-systems and to perform a hierarchical analysis by propagating the IQC characterization of each uncertain sub-system through the interconnection. For a given computational time, the conservatism of the analysis dramatically depends on the class of IQC under consideration. In this paper, we propose a new class of IQC which characterizes the phase of uncertain system. An application to the robustness analysis of a PLL network reveals that the use of this class of IQC improves the trade-off between conservatism and computation time.

Convex hierarchical analysis for the performances of uncertain large-scale systems

The performance analysis of uncertain large-scale systems is under consideration. It is performed via a hierarchical modeling and analysis of the systems thanks to the recursive application of a propagation of dissipativity properties result. In contrast to an one-step approach such as (upper bound) μ-analysis where computation time can be prohibitive for largescale systems, the proposed method allows to set the trade-off between conservatism and computation time. The approach is used on a PLL network example and illustrates the new trade-off achieved.

Optimal identification experiment design for the interconnection of locally controlled systems

This paper considers the identification of the modules of a network of locally controlled systems (multi-agent systems). Its main contribution is to determine the least perturbing identification experiment that will nevertheless lead to sufficiently accurate models of each module for the global performance of the network to be improved by a redesign of the decentralized controllers. Another contribution is to determine the experimental conditions under which sufficiently informative data (i.e. data leading to a consistent estimate) can be collected for the identification of any module in such a network.

Robust sensor localization with locally-computed, global H∞-design

This paper considers sensor localization in ℝm, i.e. the problem to find the positions of an arbitrary number of sensor nodes in the presence of at least m+1 anchor nodes, given only the inter-node distances. Assuming that the sensors lie in the convex hull of the anchors, we provide a linear, continuous-time update at each sensor that uses barycentric coordinates and Cayley-Menger determinants. In this paper, we consider design enhancements by adding a dynamic controller in the feed-forward loop of the location estimator at each sensor. We show that the dynamic controller has the ability to both speed-up the convergence and improve the transient behavior, while ensuring a certain disturbance rejection that could be introduced by inter-node communication. The design of the local controllers is based on the input-output approach, H∞ design and does not require the knowledge of global parameters. Simulations illustrates the concepts described in the paper.