Antonio Orlandi

Feature selective validation (FSV) for validation of computational electromagnetics (CEM). part I-the FSV method

A goal for the validation of computational electromagnetics (CEM) is to provide the community with a simple computational method that can be used to predict the assessment of electromagnetic compatibility (EMC) data as it would be undertaken by individuals or teams of engineers. The benefits of being able to do this include quantifying the comparison of data that has hitherto only been assessed qualitatively, to provide the ability to track differences between model iterations, and to provide a means of capturing the variability and range of opinions of groups and teams of workers. The feature selective validation (FSV) technique shows great promise for achieving this goal. This paper presents a detailed analysis of the FSV method, setting it firmly in the context of previous comparison techniques; it suggests the relationship between validation of graphically presented data and the psychology of visual perception. A set of applicability tests to judge the effectiveness of computer-based CEM validation techniques is also proposed. This paper is followed by a detailed comparison with visual assessment, which is presented in Part II

Nonorthogonal PEEC formulation for time- and frequency-domain EM and circuit modeling

Electromagnetic solvers based on the partial element equivalent circuit (PEEC) approach have proven to be well suited for the solution of combined circuit and EM problems. The inclusion of all types of Spice circuit elements is possible. Due to this, the approach has been used in many different tools. Most of these solvers have been based on a rectangular or Manhattan representation of the geometries. In this paper, we systematically extend the PEEC formulation to nonorthogonal geometries since many practical EM problems require a more general formulation. Importantly, the model given in this paper is consistent with the classical PEEC model for rectangular geometries. Some examples illustrating the application of the approach are given for both the time and frequency domain.

Quantifying SMT decoupling capacitor placement in dc power-bus design for multilayer PCBs

Noise on a dc power-bus that results from device switching, as well as other potential mechanisms, is a primary source of many signal integrity (SI) and electromagnetic interference (EMI) problems. Surface mount technology (SMT) decoupling capacitors are commonly used to mitigate this power-bus noise. A critical design issue associated with this common practice in high-speed digital designs is placement of the capacitors with respect to the integrated circuits (ICs). Local decoupling, namely, placing SMT capacitors in proximity to ICs, is investigated in this study. Multilayer PCB designs that employ entire layers or area fills for power and ground in a parallel plate structure are considered. The results demonstrate that local decoupling can provide high-frequency benefits for certain PCB geometries through mutual inductive coupling between closely spaced vias. The associated magnetic flux linkage is between the power and ground layers. Numerical modeling using an integral equation formulation with circuit extraction is used to quantify the local decoupling phenomenon. Local decoupling can effectively reduce high-frequency power-bus noise, though placing capacitors adjacent to ICs may limit routing flexibility, and tradeoffs need to be made based on design requirements. Design curves are generated as a function of power-bus layer thickness and SMT capacitor/IC spacing using the modeling approach to quantify the power-bus noise reduction for decoupling capacitors located adjacent to devices. Measurement data is provided to corroborate the modeling approach.

Signal Integrity Design for High-Speed Digital Circuits: Progress and Directions

This paper reviews recent progress and future directions of signal integrity design for high-speed digital circuits, focusing on four areas: signal propagation on transmission lines, discontinuity modeling and characterization, measurement techniques, and link-path design and analysis.

EMI reduction in switched power converters using frequency Modulation techniques

Frequency-modulation techniques have been used to reduce electromagnetic interference (EMI) produced by the clock of digital systems working in the range of hundreds of megahertz. The working principle consists of modulating the original constant clock frequency in order to spread the energy of each single harmonic into a certain frequency band, thus reducing the peak amplitude of EMI at harmonic frequencies. Nowadays, the switching frequency of power converters has increased up to values that make interesting the application of such techniques to reduce EMI emissions due to switching of power circuits. This paper presents the theoretical principles of frequency modulation using deterministic profiles for the modulating function. It shows the effectiveness of such methods in terms of EMI reduction for different modulation profiles and other parameters. The method is compared with other methods using random modulation. Tests carried out on a buck converter are presented for experimental validation of the method. A short discussion on optimal modulation profiles and parameters is also included.

EMC characterization of SMPS devices: circuit and radiated emissions model

Since the efficiency of switched mode power supplies (SMPS) is much higher than that of linear power supplies, this type of supply has gained favor among designers and manufacturers. Switching frequencies extend from tens to hundreds of kilohertz with the result that radiation from circuits carrying switched current is becoming more of a problem. This paper addresses the modeling of the converter section of an SMPS in order to calculate the current distribution and the radiated electromagnetic field. The inhomogeneities in the circuit are by equivalent electrical parameters and a technique is introduced to take into account the fictitious effects on radiation due to the electrostatic terms in the dipole equations. The global approach is validated by comparison of the computed results with those measured for a simple and clearly arranged SMPS experimental setup.

Modeling DC power-bus structures with vertical discontinuities using a circuit extraction approach based on a mixed-potential integral equation

The DC power-bus is a critical aspect in high-speed digital circuit designs. A circuit extraction approach based on a mixed-potential integral equation is presented herein to model arbitrary multilayer power-bus structures with vertical discontinuities that include decoupling capacitor interconnects. Greens functions in a stratified medium are used and the problem is formulated using a mixed-potential integral equation approach. The final matrix equation is not solved, rather, an equivalent circuit model is extracted from the first-principles formulation. Agreement between modeling and measurements is good, and the utility of the approach is demonstrated for DC power-bus design.

Equivalent network synthesis for via holes discontinuities

A methodology is presented for the synthesis of the passive equivalent circuit of via holes in multilayer printed circuit boards. The paper describes the network synthesis starting from the extraction of the poles and residues from the driving point transfer functions for two port networks. The via hole is partitioned into elementary structures assumed not electromagnetically coupled and the scattering parameters for each one of them are evaluated by using a numerical approach suitably validated by comparison with results computed by other independent numerical methods. The equivalent circuit of the complete via hole is given by the cascading of the circuits of the elementary structures. The proposed technique is validated by comparing the computed scattering parameters with those from measurements for real test boards.

Long-cable effects on conducted emissions levels

A novel frequency-domain distributed-parameter circuit model of the setup for the measurement of conducted emissions (CE) in three-conductor systems is developed in order to predict the effects that an electrically-long power cord connecting the equipment under test (EUT) to the line-impedance stabilization network (LISN) plays on CE levels. To this end, a three-conductor lossless and uniform transmission line model is adopted for the description of the power cord, and modal decomposition of the line voltages and currents to common- and differential-mode voltages and currents is used to derive new closed-form expressions of the CE at the LISN ports. Suitable EUT-to-LISN matrix transfer functions are introduced and it is shown that CE measured at the entrance of the power outlet (i.e., at the LISN ports) may differ significantly from those flowing out of the EUT mains ports, due to propagation and coupling along the power cord. The role played by the mains cable cross section on CE propagation and conversion is investigated, and upper/lower bounds for the power cord effects on CE are derived analytically by applying an asymptote plot analysis to the magnitude of the EUT-to-LISN transfer functions. Direct numerical solution of the transmission line model is used to validate the obtained literal expressions of CE and related bounds, as well as to give explicit indications about the impact of long-cable effects on CE.

Wavelet packet-based EMI signal processing and source identification

Existing techniques for recognizing and identifying disturbed signals waveforms are primarily based on visual inspection. This paper proposes a wavelet packet based technique to perform a feature extraction from the disturbance signal and a classification of the extracted features in order to identify the possible causes of the disturbance. The same wavelet based procedure is applied to signal compression and denoising in order to make the EMC analysis of the data easier.