Arash Rahnamaee

A Soft-Switched Hybrid-Modulation Scheme for a Capacitor-Less Three-Phase Pulsating-DC-Link Inverter

A soft-switched hybrid-modulation (HM) scheme is outlined for a dc-link-capacitor-less three-phase high-frequency (HF) pulsating-dc link (PDCL) isolated multistage inverter. The overall inverter comprises a front-end isolated dc/pulsating-dc converter followed by a pulsating-dc/ac converter. Because the two stages are directly connected without a dc-link capacitor, the intermediate link is a PDCL instead of a fixed-dc link as in conventional HF-link inverters. The HM modulates the pulsating-dc/ac converter such that, two of its converter legs are line-switched, while the third leg of the pulsating-dc/ac converter is switched under zero-voltage-switching condition. This is achieved by first modulating the dc/pulsating-dc converter to achieve a specific encoding of the PDCL signal, which in turn, is exploited by the modulation scheme of the pulsating-dc/ac converter to mitigate its switching loss without requiring any auxiliary circuit. Operation of the pulsating-dc/ac converter using the soft-switched HM scheme is validated using a prototype 1 kW, 72-V (dc)/208-V (ac) HF inverter.

Closed-loop control of switching transition of SiC MOSFETs

This paper presents a novel closed-loop active-gatecontrol (AGC) circuit for high-voltage SiC MOSFETs, used in the high-voltage, high-frequency and high-power-density applications. The proposed controller independently adjusts the switching di/dt and dv/dt by closed-loop control of the gate current and enables one to reach optimal performance in terms of loss, device stress, and EMI. The di/dt is adjusted to control the overvoltage stress and peak reverse recovery current while the dv/dt is adjusted to control the common mode (CM) noise and switching loss. The dv/dt is the primary source of the common mode noise in power electronics converters. Dynamic control of switching dv/dt has been somewhat overlooked in the state-of-the art works based on Si based power semiconductor devices (PSDs), and maximum achievable dv/dt is used to decrease the switching loss. However, the magnitude of generated dv/dt in the high-voltage SiC-based applications is appreciable because of the exceptionally higher switching speed of the SiC MOSFETs as compared to Si IGBTs. In contrast to other works, the proposed controller dynamically and independently controls the turn-off di/dt and dv/dt of a SiC MOSFET using closed-loop control of the gate current. Independent control of turn-off di/dt and dv/dt is achieved using a delay compensation circuit. This circuit compensates the total delay in the feedback loop and predicts the onset of transition between dv/dt and di/dt control regions. The proposed control circuit operation and advantages are presented and verified by experimental results.

A discontinuous PWM strategy optimized for high-frequency pulsating-dc link inverters

This paper presents a discontinuous pulse width modulation (PWM) scheme optimized for three-phase high-frequency pulsating-dc link (HFPDCL) inverters. HFPDCL inverters consist of a high-frequency dc/ac converter, high-frequency (HF) transformers, a rectifier, and an output three-phase inverter. HF transformers provide galvanic isolation and reduce the transformer volume in the inverter. HFPDCL inverters do not require bulky DC-link capacitors; therefore, eliminating them from the power stage of the converter increases the power density and reliability of the HFPDCL inverters. The proposed discontinuous PWM scheme is optimized based on the HF pulsating-dc waveform of the dc link of the HFPDCL inverters. It decreases the switching requirement and generates high-quality output waveforms. It clamps one predetermined phase of the output inverter to the dc bus which decreases the switching requirement of the inverter. A 2 kW prototype HFPDCL inverter is implemented to verify the performance of the proposed discontinuous PWM scheme. Using the proposed DPWM scheme for the HFPDCL inverters improves the performance of the inverter.

A novel primary-side-assisted soft-switching and fault-tolerance of a high-frequency-link inverter for renewable-energy systems

A modulation-based soft-switching scheme is outlined for a high-frequency-link (HFL) inverter, which comprises a front-end HF isolated dc/ac converter followed by an ac/dc converter and an ac/ac converter. The proposed zero-voltage and zero-current switching (ZVZCS) scheme provides loss mitigation for all three legs of the ac/ac converter. Because the output of the ac/dc converter is pulsating-dc in nature, it retains the multi-phase encoded information generated by the dc/ac converters sinusoidal modulation. Although the inverter only needs a two-phase HF transformer to generate a three-phase output, a third phase is used to yield higher fault-tolerance. That is, in case of a fault in one of the phases of the HF transformer, two other phases can carry on nominal operation. The results are verified using simulation and experiments on a 2 kW, 40 V/208 V three-phase inverter.

Introducing Optical Cascode GaN HEMT

A novel optically activated cascode gallium nitride (GaN) high-electron-mobility transistor (HEMT) is introduced and evaluated in this paper. Furthermore, optical triggering of GaN HEMT structures by cost-effective and high-power long-wavelength light sources is proposed for the first time. In electrical domain, GaN HEMTs suffer from being normally on devices, making it more complicated to design and implement gate drivers for these devices. In optical domain, GaN devices suffer from being triggered by low-power short-wavelength light sources, making them significantly more expensive and practically unprofitable. Therefore, a new optical cascode (OC) GaN HEMT is proposed in this paper to solve the problems of both electrical and optical domains. The structure of this OC GaN HEMT includes a high-power normally on (depletion mode) GaN HEMT in combination with a low-power optical switch in cascode configuration. This OC not only realizes an overall normally off (enhancementmode) structure, but also offers activationwith cost-effective long-wavelength optical sources. It also offers a single-biased configurationwithout the need for complicated electrical gate drivers. Unlike conventional electrically activated cascode GaN HEMT structures, which may be prone to electromagnetic interference noise due to the high-frequency switching operation, the optical link in this proposed scheme is immune to external noise. The results showa high-frequency switching capability of 1MHz for theOCGaN HEMT under a bias voltage of 600 V and a current of 10 A. Less voltage and current ringing are observed in the OC compared with the electrical alternative due to the elimination of gate controlling inductance introduced in the electrical cascode configuration.

Soft-switched discontinuous pulse-width pulse-density modulation scheme

This paper presents a soft-switched discontinuous pulse-width pulse-density modulation (PWPDM) scheme to decrease the switching losses of the capacitor-less high-frequency pulsating dc-link (HFPDCL) inverters. The proposed modulation scheme employs both pulse-width modulation (PWM) and pulse-density modulation (PDM) schemes to increase the overall efficiency of the inverter and generate high-quality output line-frequency (LF) Sine waveforms. In order to increase the efficiency of the converter, it decreases the switching requirement of the converter and it also provides soft-switching condition for the output inverter. The performance of the proposed PWPDM scheme is verified using am experimental 2 kW HFPDCL inverter.

Soft-switched hybrid modulation scheme for pulsating-Dc-link converters

A soft-switched modulation scheme is outlined for a high-frequency capacitor-less pulsating-dc-link inverter to mitigate switching loss of an ac/ac converter of the inverter. A front-end dc/pulsating-dc converter followed by an ac/dc converter encodes two streams of information on a pulsating-dc link using pulse placement to provide soft switching condition for the ac/ac converter. The soft-switching scheme is based on modulation using no auxiliary circuit. The soft-switching operation of the ac/ac converter is verified using a prototype 1kW, 72 V/208 V inverter.

New single-bias all-optical ETO configuration for a 15 kV-100A SiC thyristor eliminating the turn-on leakage current

In this paper a new single-bias optically-triggered (OT) emitter-turn-off (ETO) configuration for a 15kV-100A SiC thyristor, used in the next generation high-voltage high-frequency and high-power-density applications is outlined. Optical turn-off and turn-on of the OT ETO is achieved using an auxiliary optically-triggered power transistor (OTPT) in the anode path of the SiC thyristor. Leakage current during the turn-on transition of OT ETO is caused by the undesired activation of the turn-off path of the gate of the thyristor. This undesired activation is due to parasitic inductances and high di/dt in the commutation path, resulting in additional switching loss and electro-magnetic noise. In contrast to other works, the proposed method removes the leakage current enhancing the switching performance, reducing the switching loss and EMI. The other feature of the proposed work is using a single high-voltage bias eliminating the need for low-voltage (LV) control bias and devices in conventional methods. The system reliability is increased via using optical link to turn the SiC thyristor on and off, precluding the susceptibility to external noise. The proposed method and the OTPT are respectively verified through simulation and experimental results.

Modular and compact design for an isolated high-frequency-link inverter using hybrid-modulation scheme

High frequency link (HFL) power converters, due to advancements in magnetics and semiconductor devices, have been gaining considerable attention among designers and researchers. This paper presents a compact and modular isolated dc-link capacitor less HFL inverter that is suitable for renewable-energy systems. Modular three-phase insulated-gate bipolar transistor (IGBT) power modules are employed to increase the power density of the inverter. In addition, bulky dc-link capacitor is eliminated from the power stage of the inverter to achieve a compact and high-power-density design. Hybrid modulation (HM) scheme is used to decrease the switching losses of the inverter because it decreases the switching requirement of the pulsating-dc/ac converter by 66%. This paper shows that dc-link-capacitor less HFL inverter has a proper output THD over a wide range of output-load power despite that fact that it operates without any dc-link capacitors. The experimental results verify the operation of a 2 kW dc-link-capacitor less HFL inverter using the HM scheme.

Hybrid-modulation scheme for dc-link-capacitor-less high-frequency-link inverters

High-frequency-link (HFL) inverters, owing to rapid advancements in semiconductor devices and magnetics, are gaining momentum in power electronics with applications encompassing solar, wind, and fuel-cell energy systems, energy storage, electric/hybrid-electric vehicles, and power quality to name a few. HFL inverters promise the potential for simultaneous improvements in power density, reliability, cost, and efficiency, which pose R&D challenges. In that regard, one cla0ss of HFL inverters, which do not employ dc-link capacitors that are often prone to long-term reliability issues, show great promise. This paper captures the essence of our work over the last several years on a new class of modulation strategy - referred to in this paper as “hybrid-modulation (HM) scheme” - for the pulsating-dc-link HFL (PDCL-HFL) inverters.