Armando Faz-Hernández
State University of Campinas
Network
Latest external collaboration on country level. Dive into details by clicking on the dots.
Publication
Featured researches published by Armando Faz-Hernández.
the cryptographers’ track at the rsa conference | 2014
Armando Faz-Hernández; Patrick Longa; Ana Helena Sánchez
We propose efficient algorithms and formulas that improve the performance of side-channel protected scalar multiplication exploiting the Gallant-Lambert-Vanstone (CRYPTO 2001) and Galbraith-Lin-Scott (EUROCRYPT 2009) methods. Firstly, by adapting Feng et al.’s recoding to the GLV setting, we derive new regular algorithms for variable-base scalar multiplication that offer protection against simple side-channel and timing attacks. Secondly, we propose an efficient technique that interleaves ARM-based and NEON-based multiprecision operations over an extension field, as typically found on GLS curves and pairing computations, to improve performance on modern ARM processors. Finally, we showcase the efficiency of the proposed techniques by implementing a state-of-the-art GLV-GLS curve in twisted Edwards form defined over \(\mathbb{F}_{p^2}\), which supports a four dimensional decomposition of the scalar and runs in constant time, i.e., it is fully protected against timing attacks. For instance, using a precomputed table of only 512 bytes, we compute a variable-base scalar multiplication in 92,000 cycles on an Intel Ivy Bridge processor and in 244,000 cycles on an ARM Cortex-A15 processor. Our benchmark results and the proposed techniques contribute to the improvement of the state-of-the-art performance of elliptic curve computations. Most notably, our techniques allow us to reduce the cost of adding protection against timing attacks in the GLV-based variable-base scalar multiplication computation to below 10%.
Journal of Cryptographic Engineering | 2011
Jonathan Taverne; Armando Faz-Hernández; Diego F. Aranha; Francisco Rodríguez-Henríquez; Darrel Hankerson; Julio López
The availability of a new carry-less multiplication instruction in the latest Intel desktop processors significantly accelerates multiplication in binary fields and hence presents the opportunity for reevaluating algorithms for binary field arithmetic and scalar multiplication over elliptic curves. We describe how to best employ this instruction in field multiplication and the effect on performance of doubling and halving operations. Alternate strategies for implementing inversion and half-trace are examined to restore most of their competitiveness relative to the new multiplier. These improvements in field arithmetic are complemented by a study on serial and parallel approaches for Koblitz and random curves, where parallelization strategies are implemented and compared. The contributions are illustrated with experimental results improving the state-of-the-art performance of halving and doubling-based scalar multiplication on NIST curves at the 112- and 192-bit security levels and a new speed record for side-channel-resistant scalar multiplication in a random curve at the 128-bit security level. The algorithms presented in this work were implemented on Westmere and Sandy Bridge processors, the latest generation Intel microarchitectures.
international conference on progress in cryptology | 2012
Diego F. Aranha; Armando Faz-Hernández; Julio López; Francisco Rodríguez-Henríquez
We design a state-of-the-art software implementation of field and elliptic curve arithmetic in standard Koblitz curves at the 128-bit security level. Field arithmetic is carefully crafted by using the best formulae and implementation strategies available, and the increasingly common native support to binary field arithmetic in modern desktop computing platforms. The i-th power of the Frobenius automorphism on Koblitz curves is exploited to obtain new and faster interleaved versions of the well-known τNAF scalar multiplication algorithm. The usage of the
cryptographic hardware and embedded systems | 2011
Jonathan Taverne; Armando Faz-Hernández; Diego F. Aranha; Francisco Rodríguez-Henríquez; Darrel Hankerson; Julio López
\tau^{\lfloor m/3 \rfloor}
international conference on progress in cryptology | 2015
Armando Faz-Hernández; Julio López
and
IEEE Transactions on Computers | 2018
Armando Faz-Hernández; Julio López; Eduardo Ochoa-Jiménez; Francisco Rodríguez-Henríquez
\tau^{\lfloor m/4 \rfloor}
Space | 2017
Armando Faz-Hernández; Hayato Fujii; Diego F. Aranha; Julio López
maps are employed to create analogues of the 3-and 4-dimensional GLV decompositions and in general, the
Journal of Cryptographic Engineering | 2015
Armando Faz-Hernández; Patrick Longa; Ana Helena Sánchez
\lfloor m/s \rfloor
IACR Cryptology ePrint Archive | 2013
Armando Faz-Hernández; Patrick Longa; Ana Helena Sánchez
-th power of the Frobenius automorphism is applied as an analogue of an s-dimensional GLV decomposition. The effectiveness of these techniques is illustrated by timing the scalar multiplication operation for fixed, random and multiple points. In particular, our library is able to compute a random point scalar multiplication in just below 105 clock cycles, which sets a new speed record across all curves with or without endomorphisms defined over binary or prime fields. The results of our optimized implementation suggest a trade-off between speed, compliance with the published standards and side-channel protection. Finally, we estimate the performance of curve-based cryptographic protocols instantiated using the proposed techniques and compare our results to related work.
IACR Cryptology ePrint Archive | 2012
Diego F. Aranha; Armando Faz-Hernández; Julio López; Francisco Rodríguez-Henríquez
The availability of a new carry-less multiplication instruction in the latest Intel desktop processors significantly accelerates multiplication in binary fields and hence presents the opportunity for reevaluating algorithms for binary field arithmetic and scalar multiplication over elliptic curves. We describe how to best employ this instruction in field multiplication and the effect on performance of doubling and halving operations. Alternate strategies for implementing inversion and half-trace are examined to restore most of their competitiveness relative to the new multiplier. These improvements in field arithmetic are complemented by a study on serial and parallel approaches for Koblitz and random curves, where parallelization strategies are implemented and compared. The contributions are illustrated with experimental results improving the state-of-the-art performance of halving and doubling-based scalar multiplication on NIST curves at the 112- and 192-bit security levels, and a new speed record for side-channel resistant scalar multiplication in a random curve at the 128-bit security level.