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Publication
Featured researches published by Arthur James Sutton.
Ibm Journal of Research and Development | 1992
Chin-Long Chen; Nandakumar N. Tendolkar; Arthur James Sutton; My-Yue Hsiao; Douglas Craig Bossen
The 9021-type processors offer the highest performance of the IBM Enterprise System/9000™ (ES/9000™) series. They also have the highest levels of concurrent error detection, fault isolation, recovery, and availability of any IBM general-purpose processor. High availability is achieved by minimizing component failure rates through improvements of the base technology, and design techniques that permit hard and soft failure detection, recovery and isolation, and component replacement concurrent with system operation. In this paper, we discuss fault-tolerant design techniques for array, logic, and storage subsystems. We also present diagnostic strategy, fault isolation, and recovery techniques. New features such as the redundant power system and Processor Availability Facility are described. The overall recovery design is described, as well as specific implementation schemes. The design process to verify the error detection, fault isolation, and recovery is also described.
Ibm Journal of Research and Development | 1982
John J. Reilly; Arthur James Sutton; Robert Nasser; Robert Griscom
The IBM 3081 represents an important step in the evolution of large-scale data processing systems. The incorporation of LSI technology in its design has resulted in a departure from the use of traditional support tools and techniques. Its increased processing capabilities and its dyadic organization have further accented the requirements for high availability and ease of operation. This paper describes the Processor Controller unit of the 3081 Processor Complex, which handles the functions of maintenance, monitoring, and control of the system. It discusses how this unit has dealt with these changes to keep pace with the demands of advanced technology and improved system availability. In providing the necessary test and support functions of reset and manual control, the Processor Controller exploits the level-sensitive scan design capability of the 3081 to obtain read/write access to all latches and arrays. This design approach, coupled with significantly expanded capabilities for error recovery, configuration control, and diagnostics, has significantly affected the structure and capabilities of the Processor Controller.
Archive | 1991
Thomas M. Brey; Matthew Anthony Krygowski; Bruce Lloyd Mcgilvray; Trinh Huy Nguyen; William Wu Shen; Arthur James Sutton
Archive | 1982
Brian B. Moore; John Ted Rodell; Arthur James Sutton; Jeff D. Vowell
Archive | 1980
Gordon Stanley Sager; Arthur James Sutton
Archive | 1996
Matthew Anthony Krygowski; Arthur James Sutton
Archive | 1994
Matthew Anthony Krygowski; Arthur James Sutton
Archive | 1984
Bruce Lloyd Mcgilvray; Arthur James Sutton
Archive | 1988
Neal Taylor Christensen; Steven Tyler Comfort; Robert John Hurban; Bruce Lloyd Mcgilvray; Arthur James Sutton; James Robert Urquhart; David R. Willoughby
Archive | 1981
Gordon Stanley Sager; Arthur James Sutton