Asaf Ashkenazi

Platform independent overall security architecture in multi-processor system-on-chip integrated circuits for use in mobile phones and handheld devices

A platform independent security architecture for use in Multi-Processor System-on-Chip integrated circuits, primarily oriented for mobile phones and handheld devices, is presented. The suggested architecture provides an enhanced security protection scheme for use in smartphones, PDAs, as well as other similar systems. Sensitive data storage facilities, cryptographic engines, and physical protection mechanisms such as debug port access control are presented and described in detail. The proposed secure architecture has been incorporated as a part of an application processor which in turn is embedded in a number of smartphone and handheld products. System operation is discussed and hardware realization and experimental results of the proposed architecture are described.

Platform Independent Debug Port Controller Architecture with Security Protection for Multi-Processor System-on-Chip ICs

A debug port controller (DPC) architecture, designed for re-use in multiple system-on-chip (SoC) integrated circuits (ICs) is presented. The DPC incorporates security protection against unauthorized access along with advanced debugging features such as long chain debugging, universal BIST engines control, and generic serial interfaces. Implemented security architecture of DPC is presented together with an overall IC security scheme. DPC is the most important part of this IC security scheme. The suggested architecture demonstrates extensive use of the debug process, and re-use of the DPC in multiple SoC ICs without the need of adopting its design for a specific SoC. The implementation of the DPC for IEEE 1149.1 standard is presented and the hardware realization of the proposed architecture is described in detail. The DPC that incorporates the proposed architecture has been designed in a 90 nm CMOS process as an integral part of several SoC ICs

Platform Independent Overall Security Architecture in Multi-Processor System-on-Chip ICs for Use in Mobile Phones and Handheld Devices

A platform independent security architecture for use in multi-processor system-on-chip integrated circuits, primarily oriented for mobile phones and handheld devices, is presented. The suggested architecture provides an enhanced security protection scheme for use in smartphones, PDAs, as well as other similar systems. Sensitive data storage facilities, cryptographic engines, and physical protection mechanisms such as debug port access control are presented and described in detail. The proposed secure architecture has been incorporated as a part of an application processor which in turn is embedded in a number of smartphone and handheld products. System operation is discussed and hardware realization and experimental results of the proposed architecture are described.