Asamira Suzuki

Blocking-voltage boosting technology for GaN transistors by widening depletion layer in Si substrates

We propose a novel technique to boost the blocking voltage of AlGaN/GaN hetero junction field effect transistors (HFETs) by widening a depletion layer in highly resistive Si substrate. The blocking-voltage boosting (BVB) technology utilizes ion implantation at the peripheral area of the chip as channel stoppers to terminate the leakage current from the interfacial inversion layers at AlN/Si. A depletion layer is widened in the substrate by the help of the channel stopper, which increases the blocking voltage of the HFET. The off-state breakdown voltage of the HFETs is increased up to 1340V by the BVB technology from 760V without the channel stoppers for the epitaxial GaN as thin as 1.4µm on Si. This technology greatly helps to increase the blocking voltage even for thin epitaxial GaN on Si, which leads to further reduction of the fabrication cost.

NiO gate GaN-based enhancement-mode hetrojunction field-effect transistor with extremely low on-resistance using metal organic chemical vapor deposition regrown Ge-doped layer

In this paper, we present a normally-off GaN-based transistor with an extremely low on-resistance (R on) fabricated by using a Ge-doped n++-GaN layer for ohmic contacts. We developed a novel GaN regrowth technique using Ge as a dopant, which achieved an extremely high doping concentration of 1 × 1020 cm−3, and thereby the lowest specific contact resistance of 1.5 × 10−6 Ωcm2. The NiO gate fabricated using an atomic layer deposition technique reduced the spacing between the source and drain electrodes. The fabricated device showed the record-breaking R on of 0.95 Ωmm with the maximum drain current and transconductance of 1.1 A/mm and 490 mS/mm, respectively. Note that the obtained threshold voltage was 0.55 V. This extremely low R on characteristic indicates the great potential of NiO-gate GaN-based heterojunction field-effect transistors.

Dark Current Reduction of Avalanche Photodiode Using Optimized InGaAsP/InAlAs Superlattice Structure

We studied reduction in dark current of avalanche photodiodes (APDs) using an optimized InGaAsP/InAlAs superlattice (SL) structure, which was fabricated by gas-source molecular beam epitaxy. For the sample which has the thickest barrier and the thinnest well, the dark current value of 0.4 µA at a multiplication factor of 10 was achieved. This is the lowest dark current for InGaAsP/InAlAs SL-APDs to our knowledge. This result shows that the band-to-band tunneling current, which affects dark current, was suppressed by increasing the effective band gap energy of the SL multiplication layer. Moreover, we discussed the mechanism of avalanche multiplication and confirmed the reason why sufficient avalanche multiplication occurred in optimized InGaAsP/InAlAs SL-APD even at low electric field. It was concluded that an optimized InGaAsP/InAlAs SL structure effectively enhances electron impact ionization and also improves dark current.

Extremely low on-resistance enhancement-mode GaN-based HFET using Ge-doped regrowth technique

In this paper, we present a normally-off GaN-based transistor with extremely low on-state resistance fabricated by using Ge-doped n⁺⁺GaN layer for ohmic contact. We developed a new GaN regrowth technique using Ge, which achieved extremely high doping level of 1 × 10²⁰ cm^-3, and thereby the lowest specific contact resistance of 1.5 × 10^-6 Ω·cm². Selectively deposited NiO gate using Atomic Layer Deposition (ALD) technique contributed to shorten the spacing between source and drain, making normally-off characteristics even with the 30% Al mole fraction of AlGaN. The fabricated device showed the record-breaking R_on of 0.95 Ω·mm with maximum drain current (I^d,MAX) and transconductance (g_m) of 1.1 A/mm and 490 mS/mm, respectively. It is noted that the obtained V_th was 0.55 V. An on/off current ratio of 5 × 10⁶ is also achieved.

Growth, characterization and avalanche photodiode application of strain compensated InGaAsP/InAlAs superlattice

We applied InGaAsP/InAlAs strain compensated superlattice (SCSL) structure to the multiplication region of avalanche photodiode (APD) for the first time using gas-source molecular beam epitaxy. For the InGaAsP/InAlAs SCSL structure, material quality was evaluated by means of cross-sectional transmission electron microscope analysis and X-ray rocking curves. SCSL-APD device was fabricated and dark current property was also compared to normal InGaAsP/InAlAs superlattice avalanche photodiode (SL-APD). It was found that application of the SCSL structure to the multiplication layer in SL-APD improves the dark current property.

Normally-off AlGaN/GaN MIS-HFET using stacked NiO/Al 2 O 3 Gate Structure Formed by Atomic Layer Deposition

In this paper, we report a novel normally-off GaN-based transistor fabricated using stacked p-type oxide semiconductor layer and insulator layer gate structure. The device exhibits a good normally-off operation without gate recess structure. The fabricated device shows extremely low off-state leakage current, low channel resistance of 3Ωmm, and high threshold voltage of 1.6V.