Ashwni Kumar

Triple well subthreshold CMOS logic using body-bias technique

Subthreshold logic provides extremely low power consumption since the power supplies are kept below the threshold voltage and using the small subthreshold current of MOS transistors to operate. Subthreshold circuits are ideal for ultra low power applications however they suffer from low operating speeds. By improving the speed of subthreshold circuits their application spectrum can be expanded. In this paper a body-bias technique in triple well CMOS technology is explored to match the subthreshold currents of both the NMOS and PMOS transistors for improving the speed of subthreshold circuits. We derive an approximate expression for the generated body bias voltage. Circuit simulations were conducted using 180nm CMOS technology to validate proposed concept. The results were compared with standard body bias technique in terms of delay and power consumption. The proposed body biasing technique improves power-delay product by approx. 38%.

A Novel Technique to Achieve High Bandwidth at Low Supply Voltage

In this work we have demonstrated a novel technique to achieve high bandwidth in differential amplifier. This technique is based on using a composite transistor configuration consisting of dynamic threshold MOS transistor (DTMOS) and a source follower. This composite transistor has higher value of transconductance and bandwidth than conventional DTMOS. The use of this technique increases the bandwidth of differential amplifier by a factor of 3.36 at unity gain. Analytical and simulated results are in good agreement. All the circuits have been designed in 180nm CMOS technology. The proposed differential amplifier would find interesting applications for low voltage RF design.

Low Voltage CMOS Active Inductor with Bandwidth and Linearity Improvement

In this work a current regulated CMOS active inductor is proposed using dynamic threshold MOS transistor (DTMOS). The proposed active inductor is based on the gyrator-C approach with positive transconductance stage realized by DTMOS. The bandwidth and linearity of proposed inductor is improved using a new approach. The proposed approach is based on simultaneous use of inductive peaking and feed-forward current source technique Simulated result shows that DTMOS in the proposed circuit gives a high linearity in the active inductors characteristics and a bandwidth extension ratio of 3.5 is achieved. The proposed circuit has been designed using the TSMC 180nm technology node at 1V supply to prove the validity of the concept.

Bandwidth extension of analog multiplier using dynamic threshold MOS transistor

This paper presents an attractive approach for bandwidth extension of a four quadrant CMOS analog multiplier. The proposed approach is based on using dynamic threshold MOS transistor (DTMOS) which is an effective technique that achieves supply voltage reduction with a simultaneous increase in the overall transconductance of the MOS transistor. The proposed multiplier can operate at very high frequencies at low supply voltage of 0.6V without any distortion. The proposed approach increases the bandwidth of multiplier by 4.6GHz at unity gain. This multiplier is simulated at 180nm technology and has high gain in comparison to previous reported circuit. The proposed approach optimizes multiplier bandwidth and thus more suitable for high frequency and low voltage applications.

Subthreshold Logic Using Body-Bias Technique for Digital VLSI Neural Applications

The Electronic neuron is able to mimic the behavior of actual biological neuron with real time adaptability. For VLSI implementation, each building block for the neuron circuit is designed for low power and small silicon area. It is possible to process large quantities of sensory inputs in real time with low power operation using sub threshold techniques. Sub threshold MOS currents are comparable to ionic currents in cell membranes, which range from a few Pico amperes to a few microamperes. But in most of the implementations using sub threshold MOS circuits, body effect i.e. dependence of subthresdold current on potential difference between body and source terminal (VSB) is either neglected or it has not been taken into account. In this paper we have explored body bias technique to take into account the body effect. Extensive circuit simulations were conducted for with 180nm technology parameters at 0.5V to validate the proposed idea. The proposed body bias technique has improved power-delay product parameter for sub threshold digital circuits and thus has great degree of freedom in the design of low voltage digital VLSI circuits for neural applications.

PL approximation of DBPSK in DF-based cooperative FSO network with pointing error

In this paper, we utilize piecewise linear (PL) approximation to analyze the performance of cooperative free space optical (FSO) network employing differentially modulated binary phase shift keying (DBPSK) data with multiple decode-and-forward (DF) relays. The maximum-likelihood (ML) decoding rule at the destination is approximated by PL approximation which considers the possibility of erroneous relaying and performs very similar to the ML decoder with reduced decoding complexity. The atmospheric fading optical links are modeled by Gamma–Gamma distribution subject to both types of detection techniques, i.e., heterodyne detection and intensity modulation/direct detection (IM/DD) with pointing error. We analytically formulate the probability of error for the multiple-DF relay-based FSO network. However, the novel unified expression of average bit error rate (BER) of PL decoder with single relay and single source to destination pair is derived. Further, we also derive the asymptotic approximate BER of DF-FSO network with multiple relays at high signal-to-noise ratio (SNR) of source to relay links considering heterodyne detection with negligible pointing error. In addition, the unified closed-form expressions of outage probability with single and multiple DF relays are derived in terms of Meijer G function. The expression of outage probability is examined at high SNR in order to obtain analytical diversity order. The impact of different power distribution techniques on outage probability is determined by utilizing power distribution parameters. The derived analytical results are validated through simulation.

On the performance of differential cooperative DF-FSO network utilizing PL approximation

In this paper, we analyze differential binary modulation for decode-and-forward (DF) based cooperative free space optical (FSO) network utilizing piecewise linear (PL) approximation and Gamma-Gamma (GG) fading links. We adopt subcarrier intensity modulation (SIM) scheme and a single relay for transmitting the binary phase shift keying (BPSK) modulated data over the FSO channels. The PL decoder considers the possibility of erroneous relaying and performs almost similar to optimal maximum likelihood (ML) decoder. For the considered differential DF-FSO cooperative network, we analytically derive exact expression for average bit error rate (BER) and outage probability. Moreover, we also obtain analytical diversity order from the derived closed form expression of outage probability. The impact of different power allocation schemes on BER is determined by utilizing power allocation factor.

Mixed RF/FSO communication system with 2×2 DF relay over generalized fading channels

In this paper, we consider the data communication over asymmetric dual hop network having one radio frequency (RF) hop followed by a free space optical (FSO) hop. The communication between a single antenna based RF transmitter and a single aperture based optical receiver is assisted by a decode-and-forward (DF) based dual-input dual-output (DIDO) relay, which possesses RF/FSO capabilities. We have assumed the Generalized-K (KG) distribution for irradiance fluctuations of FSO links and Nakagami-m distribution for channel coefficients of RF links. The KG distribution is a generic statistical model which has been used for a wide range of atmospheric turbulence induced fading in FSO communications. For independent and identically distributed (i.i.d.) links of the two hops, we derive the closed-form expression of average error probability (AEP) by utilizing maximal ratio combining (MRC) (for RF reception) and repetition coding (for FSO transmission) at relay node. Moreover, we analyze the outage performance of the considered mixed RF/FSO communication system. Further, we perform the asymptotic analysis of the system under consideration and derive the expressions for asymptotic AEP and asymptotic outage probability (AOP) at high signal-to-noise ratio (SNR) conditions. The analytically obtained results are verified through simulations.

Performance evaluation of decode-and-forward-based asymmetric SIMO-RF/FSO system with misalignment errors

The authors analyse a dual-hop mixed radio frequency/free space optical (RF/FSO) communication system comprising of single-input multiple-output (SIMO) RF hop and a single FSO hop. The RF source is connected to an optical destination through a decode-and-forward relay having RF/FSO capabilities. Each link in SIMO-RF hop is assumed to experience independent and identically distributed (i.i.d.) Nakagami- m fading. For FSO hop, a unified novel expression for the probability density function (PDF) of irradiance has been derived which unifies Gamma-Gamma and generalised- K (K G ) distributions with misalignment error. Moreover, we obtain a unified PDF of instantaneous signal-to-noise ratio (SNR) by unifying the heterodyne detection and intensity modulation/direct detection schemes. Utilising the unified PDF, we derive novel unified closed-form expressions for average symbol error probability (for different RF modulation techniques), outage probability, and ergodic capacity for the system under consideration. We have also analysed the considered system for high SNR conditions and have analytically obtained the unified diversity order of the same. The derived results clearly show the impact of misalignment error, severe atmospheric conditions, type of detection scheme, and number of RF links on the system performance. All the analytical results are validated through simulations.

Self-cascode active inductor in 65nm bulk CMOS for low power RF oscillator

This paper shows an effective and novel implementation of the self-cascode technique in the design of a CMOS active inductor in 65nm CMOS bulk technology with a triple-well process. The current operated active inductor operates at a self-resonant frequency of 0.447 GHz at a relatively low bias current (less than 150 uA) drawn from a 1.2 V voltage supply. The design methodology of the self-cascode CMOS active inductor is investigated and discussed. A low voltage, differential output LC oscillator is designed using the proposed self-cascode active inductor to assess the feasibility of the latter in RF and microwave circuits. The operation of the circuits proposed in this paper is verified using Cadence simulation tools.