Atsuo Mutoh
Tokyo University of Agriculture and Technology
Network
Latest external collaboration on country level. Dive into details by clicking on the dots.
Publication
Featured researches published by Atsuo Mutoh.
Electronics and Communications in Japan Part I-communications | 1997
Xin Xu; Shuichi Nitta; Atsuo Mutoh; Shesha H. Jayaram
The purpose of this study is to clarify the mechanism of electromagnetic interference of a multiconductor twisted-pair wire circuit. In this study, two-cored (n = 2) twisted-pair wire is treated and a simple model of twisted-pair wire is proposed. Using the proposed twisted-pair wire model, crosstalk between twisted-pair wires is predicted. Based on the calculated and experimental results it is shown that both inductive and capacitive coupling must be taken into account in order to accurately predict the crosstalk between twisted-pair wires. For inductively coupled induced voltages, the same technique that is used for the parallel wires has been used; but a new technique is proposed for calculation of capacitively coupled voltages.
international symposium on electromagnetic compatibility | 1998
T. Miyashita; Shuichi Nitta; Atsuo Mutoh
To reduce power supply noise such as power bounce and GND bounce, ferrite beads are usually inserted between the power supply and V/sub cc/ terminal of an IC by trial and error. An analytical approach on noise reduction effect of ferrite beads has not been established yet, referring to the catalog data on ferrite beads. In this paper, the noise reduction effect of ferrite beads on electromagnetic interference (EMI) is analytically discussed. Resonance characteristics of a digital circuit with ferrite beads are calculated and noise reduction effects are predicted in this paper. Near field EMI spectra are predicted and are compared with measured results. With respect to peak level of EMI spectra, predicted results coincide with measured results within an error of 4 dB.
international symposium on electromagnetic compatibility | 1998
Junpei Nonaka; Shuichi Nitta; Atsuo Mutoh; T. Miyashita
This study discusses the influence of a heat sink (in the case that a heat sink is a plain conductor) on noise susceptibility of an IC. Paying attention to the capacitive coupling between adjacent PCBs (printed circuit boards), the equivalent model of capacitive coupling in the case of the existence of a heat sink is proposed. The induced noise voltage on an IC lead is predicted by applying the finite element method to the prediction of the capacitance between a noise source and a heat sink, and the predicted results are compared with the measured results. It is concluded that prediction method is practically useful below the 100 MHz, as the predicted results coincide with measured results within 2 dB below 50 MHz and within 5 dB below 90 MHz.
international symposium on electromagnetic compatibility | 1999
J. Shao; Shuichi Nitta; Atsuo Mutoh
In this study, the influence of the location of a ground plane on the induced noise (crosstalk) on a twisted-pair-wire (TPW) by parallel lines is experimentally and theoretically discussed by paying attention to capacitive coupling between the TPW and the parallel lines. The capacity is obtained by applying the finite element method (FEM) to the calculation of electric field intensity. It is confirmed that calculated results are in good agreement with experimental results within 1 dB. It is concluded that the closer the TPW is to ground plane, the smaller the induced noise on the TPW becomes.
Electronics and Communications in Japan Part I-communications | 2001
Tsuneo Tsukagoshi; Shuichi Nitta; Atsuo Mutoh
Flip-flops were originally designed to be symmetrical for set/reset operation. This paper proposes an asymmetrical noise immunity flip-flop that has a different noise voltage for Q: HL than for Q: LH when the flip-flop malfunctions due to noise on the dc power supply. It is shown that an asymmetrical noise immunity flip-flop can be created by giving different overdrive factors (ODFs) to each of the two transistors in the flip-flop, where ODF is Ib/Ibmin (Ib: base current of initially saturated transistor, Ibmin: minimum base current required to maintain saturation).
IEICE Transactions on Communications | 1996
Shuichi Nitta; Atsuo Mutoh; Kiyotomi Miyajima
IEICE Transactions on Electronics | 1998
Kiyotomi Miyajima; Shuichi Nitta; Atsuo Mutoh
international symposium on electromagnetic compatibility | 1999
Junpei Nonaka; Shuichi Nitta; Atsuo Mutoh; Takuya Miyashita
IEICE technical report. Electromagnetic compatibility | 1995
Xu Xin; Shuichi Nitta; Atsuo Mutoh
Electronics and Communications in Japan Part Ii-electronics | 2003
Tsuneo Tsukagoshi; Shuichi Nitta; Atsuo Mutoh