Atsushi Narazaki

Power semiconductor device having semiconductor-layer-forming position controlled by ion implantation without using photoresist pattern, and method of manufacturing such power semiconductor device

Insulated gate semiconductor device having first trench and second trench connected to the same

Semiconductor device having diode for input protection circuit of MOS structure device

Insulated gate semiconductor device and method for manufacturing the same

Insulated gate semiconductor device and method of manufacturing the same

Method of fabricating insulated gate semiconductor device

Halbleiterbauelement und dessen Herstellungsverfahren A semiconductor device and its manufacturing method

A semiconductor device and its manufacturing method

Isolierte Gatehalbleitervorrichtung mit einer Grabenstruktur Insulated gate semiconductor device having a structure grave

Insulated gate semiconductor device with a grave structure