Avinash C. Palaniswamy
Motorola
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Featured researches published by Avinash C. Palaniswamy.
workshop on parallel and distributed simulation | 1993
Avinash C. Palaniswamy; Philip A. Wilsey
The successful application of optimistic synchronization techniques in parallel simulation requires that rollback overheads be contained. The chief contributions to rollback overhead in a Time Warp simulation are the time required to save state information and the time required to restore a previous state. Two competing techniques for reducing rollback overhead are periodic checkpointing (Lin and Lazowska, 1989) and incremental state saving (Bauer et al., 1991). This paper analytically compares the relative performance of periodic checkpointing to incremental state savings. The analytical model derived for periodic checkpointing is based almost entirely on the previous model developed by Lin (Lin and Lazowska, 1989). The analytical model for incremental state saving has been developed for this study. The comparison assumes an optimal checkpoint interval and shows under what simulation parameters each technique performs best.
great lakes symposium on vlsi | 1993
Avinash C. Palaniswamy; Philip A. Wilsey
The authors address one problem of speeding parallel digital system simulation using time warp, namely, that logical processes with errant behavior can incur considerable rollback behavior (analogous to thrashing in paging virtual memories). Consequently, additional mechanisms must be added to an optimistically synchronized simulator to inhibit excessive rollback. They describe a method of adaptively sizing bounded time windows to balance lookahead processing.<<ETX>>
Journal of Parallel and Distributed Computing | 1996
Avinash C. Palaniswamy; Philip A. Wilsey
Time Warp is an optimistic synchronization protocol used for parallel discrete event simulation. While Time Warp has the potential to reduce the execution time of large simulations, it has been plagued by a variety of problems, namely: 1. Instability due to thrashing effects caused by echoing and cascading rollbacks. 2. Memory bottlenecks due to state saving and excessive optimism. 3. Inefficient scheduling algorithms for scheduling Time Warp processes on each processing node. These problems have inhibited the widespread use of Time Warp as a general purpose synchronization algorithm. The general trend of researchers attempting to solve these problems has been to statically limit the optimism of Time Warp. Unfortunately, these attempts have achieved only limited success. This is because a static set of parameters may perform well for one simulation but not for another. This paper attacks the problem using adaptive mechanisms to control optimism, using an index of performance called useful work. This research presents solutions for the above mentioned problems, by: 1. Stabilizing Time Warp using adaptive bounded time windows. 2. Reducing memory usage and overall execution time by using an adaptive mechanism to vary the checkpoint interval. 3. Scheduling Time Warp processes with the useful work parameter to favor more productive processes. Using this new performance index called Useful Work, several modifications to Time Warp are implemented to stabilize and improve Time Warp. Thus, this new improved Time Warp synchronization mechanism termed Parameterized Time Warp provides an integrated adaptive solution to optimistic Parallel Discrete Event Simulation. Empirical work showing that PTW outperforms an equivalent Time Warp simulation executing under similar partitioning and load conditions is also presented.
annual simulation symposium | 1992
Avinash C. Palaniswamy; Sandeep Aji; Philip A. Wilsey
Advances in distributed computing have resulted in the design of fast simulators for digital systems. A parallel, optimistically synchronized (time warp) digital systems simulator using VHDL as the hardware description language has been developed. The simulator incorporates several optimizations to the time warp mechanism, including lazy cancellation, flow control, lazy rollback, lazy reevaluation, and rollback relaxation. This paper presents an efficient implementation of lazy reevaluation which has historically been too computationally expensive for effective utilization. The realization of this optimization is proposed in this paper results in an identification of only a subset of the total forward jumps that are possible in lazy reevaluation.<<ETX>>
annual simulation symposium | 1993
Avinash C. Palaniswamy; Sandeep Aji; Philip A. Wilsey
Technological advances have resulted in the design of large integrated circuits, and with it the need for fast simulation to decrease the design-to-market time. Parallel and distributed digital simulation has been recognized as the leading approach to provide fast simulation of digital circuits. The Time Warp Mechanism (T WM) implement:? the concept of Virtual Time to optimistically synchronize parallel simulation. However, the successful utili.ration of the Time Warp mechanism has been plagued by the time and space overheads of rollback, namely: state saving, state restoration, and event reprocessing. Several optimizations to reduce these overheads have been proposed in the literature. This paper presents empirical data relating the effectiveness of several of these Optimizations to the domain of digital system simulation. In particular, we present performcince results from lazy reevaluation, lazy cancellation, periodic state savings, and bounded time windows.
Archive | 2000
Robert L. Geiger; Jyh-Han Lin; James E. Van Peursem; Avinash C. Palaniswamy; Ambiga Subramanian; Anna Battenhouse
Archive | 2000
Avinash C. Palaniswamy; Robert L. Geiger; James E. Van Peursem
Archive | 2000
Robert L. Geiger; Avinash C. Palaniswamy
winter simulation conference | 1994
Avinash C. Palaniswamy; Philip A. Wilsey
IEEE Transactions on Very Large Scale Integration Systems | 1993
Avinash C. Palaniswamy; Philip A. Wilsey