Axel Hof

Bandwidth-efficient resilience in metro networks - a fast network-processor-based RPR implementation

Resilience is becoming a key design issue for future packet networks. The IEEE 802.17 resilient packet ring protocol has been developed. to provide the necessary cost and bandwidth efficient restoration mechanisms for traffic aggregation networks in the metropolitan area. In this paper we describe our network processor based implementation for RPR together with a bandwidth-efficient protection steering mechanism we selected. Measurement results from system integration test and a field trial prove excellent reconfiguration times well within 50 milliseconds for this solution based on reconfigurable hardware.

Fairness and Protection Behavior of Resilient Packet Ring Nodes Using Network Processors

The Resilient Packet Ring IEEE 802.17 is an evolving standard for the construction of Local and Metropolitan Area Networks. The RPR protocol scales to the demands of future packet networks and includes sophisticated resilience mechanisms that allow the reduction of equipment costs. Network processors are a new opportunity for the implementation of network nodes offering a high flexibility and a reduced time to markets. This paper describes the implementation of a Resilient Packet Ring line card for a SDH/Sonet add-drop-multiplexer using the Motorola C-5 network processor. We show the novel system architecture of the ring node influenced by the use of the network processor. System simulations and field-trial measurements verify the performance of the implemented protection and fairness mechanisms. Even with the usage of a protection steering mechanism implemented on flexible network processor hardware we were able to achieve reconfiguration times well below 50 milliseconds.

Implementation of resilient packet ring nodes using network processors

Network processors offer a new flexibility for network applications and reduce the time to market for data processing systems. In this paper, we describe the changed development process of the data plane using the Motorola C-5 network processor. We implemented a resilient packet ring line card for a SDH cross connect. We show a solution for the support of different quality of service classes with a network processor and to achieve the necessary system stability. Additionally we carried out some simulations to verify the performance of a fairness algorithm over the ring and the system behavior.