B. González

Capacitance estimation of PN varactors based on unit cells

Integrated varactors are key elements in radio frequency integrated circuits. In this paper, several structures of varactors, based on p-n junction cells, are considered. A capacitance model is required to use these structures in a CAD environment. We have developed a model which considers area and perimeter capacitances of adjacent unit cells so as the reverse voltage dependence. Tuning ranges and quality factors are all well estimated. This model is applied to four varactors and their respective unit cells fabricated with AMS SiGe 0.35 ¿m technology. Modeled values are compared with measurements and the error between our estimations and measurements are smaller than 7% in all cases.

Equivalent circuit model for capacitances in PN varactors with buried channel

In this work, varactors based on PN junction cells have been studied in order to obtain a capacitance model for radiofrequency applications. These cells are unit cells: the minimum structure that can be considered a varactor, including all necessary layers and connections. Then, a specific capacitance for a radiofrequency integrated circuit (RFIC) is obtained horizontally and vertically overlapping the necessary cells. Our circuit model estimates the total capacitance in a varactor, from two ports, considering all relevant internal contributions. Three varactors based on the same cell have been designed and fabricated in 0.35¿m SiGe technology. These novel structures were also on-wafer measured for frequencies ranging between 0.5 to 10GHz, and voltages varying from 0 to-5V. This circuit model predicts the capacitance in all cases with relative error under than 4%.

DC characteristics with substrate temperature for GaN on Si MOS-HEMTs

DC characteristics of AlGaN/GaN on Si MOS-HEMTs are measured and numerically simulated, with substrate temperature up to 140°C, varying the gate width and gate length. Different gate recess depths are simulated in ATLAS in order to further investigate and optimize the device performance. Thermal boundary conditions and device thermal resistance are included in the structure for accurate simulation of the heating response. In addition, the relationship of the threshold voltage and saturation velocity with the substrate temperature and gate width has been studied and set in order to ease the modelling of these devices.

Study of RFIDs with SOI technology for UWB

The objective of this work is to study the possibility of implementing SOI rectifiers for UWB RFIDs with undoped Double Gate MOSFETs (DG-MOSFETs). For that purpose we use two commercial TCAD tools, Sentaurus Device (created by Synopsys) and ADS (created by Agilent), wherein a large signal circuit model derived for the transistors is implemented with Verilog-A. Once the DG-MOSFETs output characteristics are fit, the rectifier performance at high frequencies is simulated; numerical and electrical results are successfully compared.

Rectennas design using DG-MOSFETs

The objective of this work is to study the possibility of implementing SOI rectennas for UWB RFIDs, with undoped Double Gate MOSFETs (DG-MOSFETs). For that purpose we use two commercial TCAD tools: Sentaurus Device (created by Synopsys), and ADS (created by Agilent) where in a large signal circuit model derived for the transistors is implemented with Verilog-A. Once the DG-MOSFETs output characteristics are fit, the rectennas performance at high frequencies is simulated; numerical and electrical results are successfully compared.

Circuit models for PN integrated varactors

This paper compares different circuit models describing the performance of integrated varactors, which are designed, manufactured, measured and simulated with a 0.35 μm silicon standard technology. Three models are presented, named: simple, capacitive-inductive and physical. Their differences consist on the circuit elements used, capacitances, inductances and resistances, and the way they are connected. The more elaborated one, the physical model, contains a large number of components and, therefore, produces a better approximation of the varactor response. All models are accurate and scalable over a wide range of layout dimensions and can be used to design radio-frequency integrated circuits, RFICs.

Coupled varactor based on PN junction and accumulation MOS for RF applications

In this work varactors based on pn-junction have been connected in parallel with accumulation mode MOS ones, in order to increase the final capacitance without losing the particular characteristics. So, three double varactors have been designed, fabricated and on-wafer measured. Results demonstrate that the combination of these varactors improve the global performance in relation to quality factor and tuning range.