B. K. Jenkins

Binary image algebra and optical cellular logic processor design

Abstract Techniques for digital optical cellular image processing are presented. A binary image algebra (BIA), built from five elementary images and three fundamental operations, serves as its software and leads to a formal parallel language approach to the design of parallel binary image processing algorithms. Its applications and relationships with other computing theories demonstrate that BIA is a powerful systematic tool for formalizing and analyzing parallel algorithms. Digital optical cellular image processors (DOCIPs), based on cellular automata and cellular logic architectures, serve as its hardware and implement parallel binary image processing tasks efficiently. An algebraic structure provides a link between the algorithms of BIA and architectures of DOCIP. Optical computing suggests an efficient and high-speed implementation of the DOCIP architectures because of its inherent parallelism and 3D global free interconnection capabilities. Finally, the instruction set and the programming of the DOCIPs are illustrated.

Image algebra representation of parallel optical binary arithmetic

A binary image algebra (BIA) that gives a mathematical description of parallel processing operations is described. Rigorous and concise BIA representations of parallel arithmetic and symbolic substitution operations are given. A sequence of programming steps for implementation of these operations on a parallel architecture is specified by the BIA representation. Examples of arithmetic operations implemented on a digital optical cellular image processor architecture are given.

Digital optical cellular image processor (DOCIP): experimental implementation.

We demonstrate experimentally the concept of the digital optical cellular image processor architecture by implementing one processing element of a prototype optical computer that includes a 54-gate processor, an instruction decoder, and electronic input-output interfaces. The processor consists of a twodimensional (2-D) array of 54 optical logic gates implemented by use of a liquid-crystal light valve and a 2-D array of 53 subholograms to provide interconnections between gates. The interconnection hologram is fabricated by a computer-controlled optical system.

Subtracting incoherent optical neuron model : analysis, experiment, and applications

To fully use the advantages of optics in optical neural networks, an incoherent optical neuron (ION) model is proposed. The main purpose of this model is to provide for the requisite subtraction of signals without the phase sensitivity of a fully coherent system and without the cumbrance of photon-electron conversion and electronic subtraction. The ION model can subtract inhibitory from excitatory neuron inputs by using two device responses. Functionally it accommodates positive and negative weights, excitatory and inhibitory inputs, non-negative neuron outputs, and can be used in a variety of neural network models. This technique can implement conventional inner-product neuron units and Grossbergs mass action law neuron units. Some implementation considerations, such as the effect of nonlinearities on device response, noise, and fan-in/fan-out capability, are discussed and simulated by computer. An experimental demonstration of optical excitation and inhibition on a 2-D array of neuron units using a single Hughes liquid crystal light valve is also reported.

Digital optical processor based on symbolic substitution using holographic matched filtering

We propose a digital optical arithmetic processor design based on symbolic substitution using holographic matched and space-invariant filters. The proposed system performs Boolean logic, binary addition, and subtraction in a highly parallel manner; i.e., the processing time depends on word size but not array size. Algorithms for performing binary addition and subtraction in parallel are presented. A skew problem occurring when symbolic substitution is applied to binary addition and subtraction with space-invariant systems is addressed, and its solution is suggested. Crosstalk in symbolic substitution is described, and new symbols which can prevent the crosstalk are introduced. System analysis and fundamental limitations of the proposed system are also presented in terms of processing time, overall light efficiency, and the maximum array size of the input data plane. The performance of the proposed system with that of the current electronic supercomputers has been compared by combining information about the processing time and maximum array size.

Analysis of weighted fan-out/fan-in volume holographic optical interconnections

The feasibility of employing volume holographic techniques for the implementation of highly multiplexed weighted fan-out/fan-in interconnections is analyzed on the basis of interconnection fidelity, optical throughput, and complexity of recording schedule or implementation hardware. These feasibility criteria were quantitatively evaluated using the optical beam propagation method to numerically simulate the diffraction characteristics of volume holographic interconnections recorded in a linear holographic material. We find that conventional interconnection architectures (that are based on a single coherent optical source) exhibit a direct trade-off between interconnection fidelity and optical throughput on the one hand, and recording schedule or hardware complexity on the other. In order to circumvent this trade-off we describe and analyze in detail an incoherent/coherent double angularly multiplexed interconnection architecture that is based on the use of multiple-source array of individually coherent but mutually incoherent sources. This architecture either minimizes or avoids several key sources of cross talk, permits simultaneous recording of interconnection weights or weight updates, and provides enhanced fidelity, interchannel isolation, and thróughput performance.

Architectures For A Sequential Optical Logic Processor

A general technique is described for implementing sequential logic circuits optically. The system consists of a nonlinear transducer which provides a two-dimensional array of gates and one or more computer generated holograms (CGHs) to interconnect the gates. The limitations on the number of gates which can be implemented in an optical system is affected by the interconnection method. We describe three interconnection methods and their respective limitations. One method, which is a hybrid of space-variant and space-invariant CGH elements, provides high gate densities and high gate-utilization rates.

Convergence of backward-error-propagation learning in photorefractive crystals.

We analytically determine that the backward-error-propagation learning algorithm has a well-defined region of convergence in neural learning-parameter space for two classes of photorefractive-based optical neural-network architectures. The first class uses electric-field amplitude encoding of signals and weights in a fully coherent system, whereas the second class uses intensity encoding of signals and weights in an incoherent/coherent system. Under typical assumptions on the grating formation in photorefractive materials used in adaptive optical interconnections, we compute weight updates for both classes of architectures. Using these weight updates, we derive a set of conditions that are sufficient for such a network to operate within the region of convergence. The results are verified empirically by simulations of the xor sample problem. The computed weight updates for both classes of architectures contain two neural learning parameters: a learning-rate coefficient and a weight-decay coefficient. We show that these learning parameters are directly related to two important design parameters: system gain and exposure energy. The system gain determines the ratio of the learning-rate parameter to decay-rate parameter, and the exposure energy determines the size of the decay-rate parameter. We conclude that convergence is guaranteed (assuming no spurious local minima in the error function) by using a sufficiently high gain and a sufficiently low exposure energy per weight update.

Shared-memory optical/electronic computer: architecture and control

The design of a parallel digital computer architecture, the shared-memory optical/electronic computer (SMOEG), and its associated control algorithms are presented. The design is based on the shared-memory model of computation and incorporates an optical interconnection network as an essential element. The arthitecture consists of a novel passive optical shuffle-exchange network, which is detailed in another paper [Appl. Opt. 33, (1994)],.that interconnects electronic processing elements with electronic memory modules and incorporates network control. Improved capability of this optical-electronic multiple-instruction multiple-data (MIMD) architecture over fully electronic implementations stems from the reduced complexity inherent in the optical interconnection network and the resulting memory access capability. In this system the simultaneous development of three main design facets, architecture, hardware, and control algorithms, is crucial in designing an efficient high-performance system.

Implementation Of A Prototype Digital Optical Cellular Image Processor (DOCIP)

A processing element of a prototype digital optical cellular image processor (DOCIP) is implemented to demonstrate a particular parallel computing and interconnection architecture. This experimental digital optical computing system consists of a 2-D array of 54 optical logic gates, a 2-D array of 53 subholograms to provide interconnections between gates, and electronic input/output interfaces. The multi-facet interconnection hologram used in this system is fabricated by a computer-controlled optical system to offer very flexible interconnections.