Network


Latest external collaboration on country level. Dive into details by clicking on the dots.

Hotspot


Dive into the research topics where B. N. Bhramar Ray is active.

Publication


Featured researches published by B. N. Bhramar Ray.


international conference on information technology | 2008

Topological Properties of a New Fault Tolerant Interconnection Network for Parallel Computer

Shakti Prasad Mohanty; B. N. Bhramar Ray; S. N. Patro; Alok Ranjan Tripathy

In this paper we introduce a new interconnection network, the extended varietal hypercube with cross connection denoted by EVHC(n,k). This network has hierarchical structure and it overcomes the poor fault tolerant properties of extended varietal hypercube. This network has low diameter, constant degree connectivity and low message traffic density.


ieee computer society annual symposium on vlsi | 2011

A New Wirelength Model for Analytical Placement

B. N. Bhramar Ray; Shankar Balachandran

Minimization of Half-Perimeter Wire length (HPWL) is a commonly used objective for circuit placement. Analytical placers require approximations of it that are smooth, continuous and differentiable. This paper proposes a new mathematical model to approximate the HPWL cost function. We discuss the theory behind the model and show its convergence properties. We derive the error bounds of the new cost function and show several desirable properties of the new approximation model. We use the global and detailed placements produced by the NTUPlacer on ISPD 2004 benchmark suite to compare the smoothed approximation to two other approximation schemes namely the LogSumExp and CHKS based approximations. Our experiments validate our theoretical results and we show that our scheme has an average of 5\% error in the total wire length. We also discuss key implementation issues that can help in keeping the analytical placers based on this approximation numerically stable.


design, automation, and test in europe | 2013

An efficient wirelength model for analytical placement

B. N. Bhramar Ray; Shankar Balachandran

Smooth approximations to half-perimeter wirelength are being investigated actively because of the recent increase in interest in analytical placement. It is necessary to not just provide smooth approximations but also to provide error analysis and convergence properties of these approximations. We present a new approximation scheme which uses a non-recursive approximation to the max function. We also show the convergence properties and the error bounds. The accuracy of our proposed scheme is better than those of the popular Logarithm-Sum-Exponential (LSE) wirelength model [7] and the recently proposed Weighted Average(WA) wirelength model[3]. We also experimentally validate the comparison by using global and detail placements produced by NTU Placer [1] on ISPD 2004 benchmark suite. The experimentations on benchmarks validate that the error bounds of our model are lower, with an average of 4% error in the total wirelength.


Archive | 2015

A Decision-Driven Computer Forensic Classification Using ID3 Algorithm

Suneeta Satpathy; Sateesh Kumar Pradhan; B. N. Bhramar Ray

Rapid evolution of information technology has caused devices to be used in criminal activities. Criminals have been using the Internet to distribute a wide range of illegal materials globally, making tracing difficult for the purpose of initiating digital investigation process. Forensic digital analysis is unique and inherently mathematical and generally comprises more data from an investigation than is present in other types of forensic investigations. To provide appropriate and sufficient security measures has become a difficult job due to large volume of data and complexity of the devices making the investigation of digital crimes even harder. Data mining and data fusion techniques have been used as useful tools for detecting digital crimes. In this study, we have introduced a forensic classification problem and applied ID3 decision tree learning algorithm for supervised exploration of the forensic data which will also enable visualization and will reduce the complexity involved in digital investigation process.


international conference on vlsi design | 2015

A Recursive Model for Smooth Approximation to Wirelength and Its Impact on Analytical Placement

B. N. Bhramar Ray; Shankar Balachandran

Analytical placement engines use half-perimeter wire length (HPWL) of the circuit as an objective function to place blocks optimally within a chip. Inspired by popularly used log sum-exp (LSE) wire length model [6], ABS wire length model [5] and weighted average (WA) wire length model [3], we propose a new recursive wire length model for HPWL, providing smooth approximation to the max function. We show that the accuracy of the new model is better than that of LSE, WA and ABS wire length models, both theoretically and experimentally. When deployed inside an analytical engine, we show that our model provides more than 12% reduction in wire length compared to LSE at the expense of 50% more runtime. We also observed that the proposed model and the existing iterative models differ in their impact on the relative effort that has to be put in at the global placement vs. The detailed placement phase.


international conference on information technology | 2014

Online Frequency Reassignment for New and Drop Calls in Wireless Cellular Networks

Narayan Patra; B. N. Bhramar Ray; Shakti Prasad Mohanty

Online frequency assignment for wireless cellular networks is one of the important research areas in recent time, where the geographical coverage area is divided into regular hexagonal regions called cells. Sequence of requests arrives over time to the cells that are headed by the base stations. Each of the requests is either a new call or a drop-call which is served by the base station by assigning the frequencies or releasing the frequencies respectively. In order to minimize the span of frequencies use to serve all the requests for new calls originating from same or neighboring cells, reassignment of the frequency of the dropped-call is done to an already existing call that uses the highest frequency. For χ-colorable networks, which are the generalization of the (3-colorable) cellular networks, we have suggested an efficient online algorithm for frequency reassignment, minimizing the span of frequency usages. The competitive ratio of the proposed online algorithm is (χ+1)/3, which is sharper than the competitive ratio (χ+1)/2 of existing similar problem without allowing reassignment of frequency. The optimality of the new algorithm is verified by finding the absolute lower and upper bounds of its competitive ratio for 3-colrable cellular network as a particular case when χ = 3.


International Journal of Computer Applications | 2012

Parallel Hermite Interpolation on Extended Fibonacci Cubes

Alok Ranjan Tripathy; B. N. Bhramar Ray; Shakti Prasad Mohanty

This work suggests a parallel algorithm for Hermite interpolation on Extended Fibonacci Cube (n) EFC1 . The proposed algorithm has 3 phases: initialization, main and final. The main phase of the algorithm involves 3 2  N multiplications, N additions, N 2 subtractions and N divisions. In final phase we propose an efficient algorithm to accumulate the partial sums of Hermite interpolation in 2 ) (log2   n N O steps as oppose to the earlier algorithm in the literature that involves 2  n steps, where N is the number of nodes, n the degree of (n) EFC1 .


networked computing and advanced information management | 2009

A New Interconnection Network for Parallel Computers

B. N. Bhramar Ray; Alok Ranjan Tripathy; Shakti Prasad Mohanty

In this paper we introduce a new interconnection network, the extended hypercube with cross connection denoted by EVHC(n,k).This network has hierarchical structure and it overcomes the poor fault tolerant properties of extended varietal hypercube. This network has better reliability and low time cost effective factor.


computer and information technology | 2015

An Optimized HPWL Model for VLSI Analytical Placement

B. N. Bhramar Ray; Srabani Das; Kabita Hazra; Narayan Patra; Susil Kumar Mohanty

In VLSI physical design, placement is an important stage. Analytical placer minimizes the half-perimeter wire lengh (HPWL) of the circuit as an objective function to place blocks optimally in the chip. This paper introduces a new smooth recursive model for HPWL function which can be used inside the analytical placers. The proposed model is more accurate than widely used log-sum-exponent (LSE)[9], weighted average (WA)[3] and ABSWL[7] models. The error upper bound of new approximation is also tightest among the existing wire length models. When deployed inside placement engine NUPlacer[1], it shows reduction in wire lengh by 12.3%, 10% and 3% on ISPD 2005 placement benchmarks compared to LSE, WA and ABSWL models respectively.


international conference on information technology | 2014

Half-Perimeter Wirelength Model for VLSI Analytical Placement

B. N. Bhramar Ray; Alok Ranjan Tripathy; Pralipta Samal; Manimay Das; Pushpanjali Mallik

Placement is a crucial stage in physical design of VLSI. At this stage, analytical placer uses half perimeter wire length (HPWL) of the circuit as an objective function to place blocks optimally within chip. Inspired by popularly used log-sum-exp (LSE) wire length model [9], absolute (ABS) wire length model [7] and weighted average (WA) wire length model [3], we propose a new smooth wire length model for HPWL, providing smooth approximations to max function. The convergence. Properties, error upper bounds of the new model are studied. The accuracy of the new model is sharper than LSE, WA and ABS wire length model. Wire length is validated by global and detail placements generated by NTU Placer [1] on ISPD 2004 benchmark suits. Experimental results show that our model provides closest approximation to HPWL than all wire length models, with an average of 2% error in total wire length.

Collaboration


Dive into the B. N. Bhramar Ray's collaboration.

Top Co-Authors

Avatar

Alok Ranjan Tripathy

College Of Engineering Bhubaneswar

View shared research outputs
Top Co-Authors

Avatar
Top Co-Authors

Avatar

Shankar Balachandran

Indian Institute of Technology Madras

View shared research outputs
Top Co-Authors

Avatar
Top Co-Authors

Avatar

Suneeta Satpathy

Biju Patnaik University of Technology

View shared research outputs
Top Co-Authors

Avatar
Top Co-Authors

Avatar
Top Co-Authors

Avatar
Top Co-Authors

Avatar
Researchain Logo
Decentralizing Knowledge