保 二宮

An Interleaved Totem-Pole Power Factor Correction Converter

This paper explains about basic working principles, implementation problems, and experimental results of a new power factor correction (PFC) topology. In this proposed topology, a totem-pole boost PFC circuit that works under interleaved critical-conduction-mode (CRM) condition is presented. The circuit is developed towards high efficiency, high performance, lowcost, simple control scheme, and low conducted electro magnetic interference (EMI) PFC circuit. The application is targeted toward middle power applications that normally employs continuous or non-bridgeless interleaved boost converter.

Triple-Hybrid Switching Strategy for Conducted-Noise Level Reduction in DC-DC Converters

A novel switching strategy for conducted-noise level reduction has been proposed in this paper. The proposed strategy uses three randomized parameters for generating the switching signals. These parameters are carrier frequency, duty-ratio, and the pulse position. This triple-hybrid switching strategy has been designed and implemented using field-programmable gate array (FPGA) technology. Moreover, the effect of using the proposed controller on commonmode and differential-mode noise, total conducted-noise, and radiated-noise characteristics of the dc-dc converter has been experimentally investigated. Furthermore, sweeping of the three randomization parameters has been carried-out for identifying the values which achieve the best conducted-noise level reduction. Numerous cases have been studied. All the studied cases have been designed, implemented and experimentally investigated. Then, the conducted-noise spectra have been compared. The experimental results show that using the proposed technique, with the identified randomization parameter values, significantly improves the conducted-noise spectrum and effectively reduces the noise peaks in both highand low-frequency ranges. Moreover, the radiated-noise spectrum has been improved.