Baogui Shi

Unfolding grain size effects in barium titanate ferroelectric ceramics

Grain size effects on the physical properties of polycrystalline ferroelectrics have been extensively studied for decades; however there are still major controversies regarding the dependence of the piezoelectric and ferroelectric properties on the grain size. Dense BaTiO3 ceramics with different grain sizes were fabricated by either conventional sintering or spark plasma sintering using micro- and nano-sized powders. The results show that the grain size effect on the dielectric permittivity is nearly independent of the sintering method and starting powder used. A peak in the permittivity is observed in all the ceramics with a grain size near 1 μm and can be attributed to a maximum domain wall density and mobility. The piezoelectric coefficient d33 and remnant polarization Pr show diverse grain size effects depending on the particle size of the starting powder and sintering temperature. This suggests that besides domain wall density, other factors such as back fields and point defects, which influence the domain wall mobility, could be responsible for the different grain size dependence observed in the dielectric and piezoelectric/ferroelectric properties. In cases where point defects are not the dominant contributor, the piezoelectric constant d33 and the remnant polarization Pr increase with increasing grain size.

Nanomechanical and nanotribological testing of ultra-thin carbon-based and MoST films for increased MEMS durability

Reliability of MEM (microelectromechanical) devices can be limited by stiction forces that develop in use. It is desirable to alter the mechanical and interfacial behaviour of the silicon surfaces by the application of very thin, low surface energy and low stress coatings. In this publication we report the nanomechanical and nanotribological characterization of a range of 5?150?nm thin films deposited on silicon by filtered cathodic vacuum arc (FCVA) and closed field unbalanced magnetron sputtering. A method of analysing nano-scratch data with spherical indenters is proposed. The method suggests the onset of non-elastic deformation in the nano-scratch test is due to substrate yield rather than film deformation on all but the softest films studied in this publication. The critical load for total film failure is a marked function of indenter radius, the ratio of hardness to modulus and the film thickness. The FCVA films were tested with probes of different radii (1.1, 3.1 and 9.0??m) and the critical load for film failure was found to vary strongly with probe radius. The deposition of <100?nm amorphous carbon films on Si could be a promising strategy for improving the reliability of Si-based MEMS devices as none of the very thin films tested underwent stress-related delamination failures that occur behind the indenter during the nano-scratch testing of thicker amorphous carbon films.

An investigation into which factors control the nanotribological behaviour of thin sputtered carbon films

Ultra-thin (20–100 nm) films deposited on Si surfaces can improve their mechanical and tribological properties. As a stepping stone towards the optimization of such ultra-thin films, herein we report experimental nanoscratch and nanowear data on a-C films of thickness in the range 200–1000 nm on Si aiming to (1) understand the role of film thickness on the nanoscratch behaviour, (2) determine whether the same factors (substrate bias, H/E ratio, etc) are at play for thick films as for the thin films, (3) determine possible design rules for thinner films enabling their optimization for MEMS applications and (4) evaluate the use of the multi-pass (3-scan) procedure for clarifying the locus of failure. To a first approximation, the critical load for total film failure in the nanoscratch test is proportional to thickness provided the films are not too stressed. a-C films of 1 µm with very high H/E, deposited under high substrate bias, perform well at low load but very poorly in more highly loaded situations. Not only do they exhibit low critical loads but also failure involves extensive delamination outside of the scratch track. This is not observed on thinner films. A suitable strategy for optimizing wear resistance for thin films for MEMS applications is to aim to maximize H/E. For the 200 nm films studied here, the films with the highest H/E showed slightly improved scratch resistance.

Assembly of a high-dielectric constant thin TiOx layer directly on H-terminated semiconductor diamond

A high-dielectric constant (high-k) TiOx thin layer was fabricated on hydrogen-terminated diamond (H-diamond) surface by low temperature oxidation of a thin titanium layer in ambient air. The metallic titanium layer was deposited by sputter deposition. The dielectric constant of the resultant TiOx was calculated to be around 12. The capacitance density of the metal-oxide-semiconductor (MOS) based on the TiOx/H-diamond was as high as 0.75 µF/cm2 contributed from the high-k value and the very thin thickness of the TiOx layer. The leakage current was lower than 10-13 A at reverse biases and 10-7A at the forward bias of -2 V. The MOS field-effect transistor based on the high-k TiOx/H-diamond was demonstrated. The utilization of the high-k TiOx with a very thin thickness brought forward the features of an ideally low subthreshold swing slope of 65 mV per decade and improved drain current at low gate voltages. The advantages of the utilization high-k dielectric for diamond MOSFETs are anticipated.

A Study of Thin Coating Wear in High Data Density Tape Heads

This paper reports on an investigation of the wear of very thin (20–50 nm) Cr2O3 hard coatings, deposited on the linear tape open (LTO) data tape heads. The differential wear of the magnetic poles on the head and subsequent pole tip recession (PTR) leading to an increase in magnetic spacing is the major factor limiting the performance of high data density data tape heads. In order to reduce or eliminate PTR, very thin Cr2O3 hard coatings were employed to reduce PTR. The coatings were deposited on the LTO heads surface using unbalanced magnetron sputtering deposition techniques. Atomic force microscopy was used to analyze the surface topography of the coated head surface. Wear measurement was carried out by the means X-ray photoelectron spectroscopy and Auger electron spectroscopy combined with argon ion depth profiling. By these means, the very small reduction in coating thickness during the wear and hence the wear rate could be accurately determined. Wear tests were conducted in modified HP LTO Ultrium Generation 1 tape drives, and it is shown that wear rates of below 5.6×10−21m3/N⋅m could be measured. Nano indentation and scratch tests were employed to study the wear of the head materials and coated heads, which indicated that pole materials suffer the greatest wear under the same wear test conditions. The coatings on the pole areas have the lowest anti-abrasive wear resistance. Compared to the uncoated heads, the PTR of LTO heads were significant reduced by Cr2O3 coatings.

Nanoscratch and nanowear testing of TiN coatings on M42 steel

Abstract Constant load, progressive load and multipass nanoscratch (nanowear) tests were carried out on 500 and 1500 nm TiN coatings on M42 steel chosen as model systems. The influences of film thickness, coating roughness, scratch direction relative to the grinding grooves on the critical load in the progressive load test and number of cycles to failure in the wear test have been determined. Progress towards the development of a suitable methodology for determining the scratch hardness from nanoscratch tests is discussed.

A study of tribology of Travan heads in linear tape recording

Abstract Tape cycling experiments were performed with a Travan™ linear tape system using metal particle (MP) media. The effects of various environmental conditions, particularly water content, on the tribology of the head/tape interface were studied. Auger electron spectroscopy (AES) and atomic force microscopy (AFM) were used to characterise the chemical and physical surface changes that occurred at the head surfaces. Transfer of material from the media to the head was observed at each condition. X-ray photoelectron spectroscopy (XPS) was used to identify the chemical changes that occurred at the media surface. This showed that in all areas of the tape, the amount of detected iron had increased, while the nitrogen (binder indicator) signal had decreased. Significant differences in elemental concentrations were also detected between areas directly in contact with the cartridge drive belt compared to those not in contact. Pole tip recession (PTR) was around 50–65 nm after 5000 passes, but increased at the higher water contents. AES results showed that stain is a function of water content, not relative humidity. It was noted that a larger ceramic grain size seemed to increase PTR.

Titanium Dioxide Engineered for Near-dispersionless High Terahertz Permittivity and Ultra-low-loss.

Realising engineering ceramics to serve as substrate materials in high-performance terahertz(THz) that are low-cost, have low dielectric loss and near-dispersionless broadband, high permittivity, is exceedingly demanding. Such substrates are deployed in, for example, integrated circuits for synthesizing and converting nonplanar and 3D structures into planar forms. The Rutile form of titanium dioxide (TiO2) has been widely accepted as commercially economical candidate substrate that meets demands for both low-loss and high permittivities at sub-THz bands. However, the relationship between its mechanisms of dielectric response to the microstructure have never been systematically investigated in order to engineer ultra-low dielectric-loss and high value, dispersionless permittivities. Here we show TiO2 THz dielectrics with high permittivity (ca. 102.30) and ultra-low loss (ca. 0.0042). These were prepared by insight gleaned from a broad use of materials characterisation methods to successfully engineer porosities, second phase, crystallography shear-planes and oxygen vacancies during sintering. The dielectric loss achieved here is not only with negligible dispersion over 0.2–0.8 THz, but also has the lowest value measured for known high-permittivity dielectrics. We expect the insight afforded by this study will underpin the development of subwavelength-scale, planar integrated circuits, compact high Q-resonators and broadband, slow-light devices in the THz band.

Reduced thermal conductivity by nanoscale intergrowths in perovskite like layered structure La2Ti2O7

The effect of substitution and oxidation-reduction on the thermal conductivity of perovskite-like layered structure (PLS) ceramics was investigated in relation to mass contrast and non-stoichiometry. Sr (acceptor) was substituted on the A site, while Ta (donor) was substituted on the B site of La2Ti2O7. Substitution in PLS materials creates atomic scale disorders to accommodate the non-stoichiometry. High resolution transmission electron microscopy and X ray diffraction revealed that acceptor substitution in La2Ti2O7 produced nanoscale intergrowths of n = 5 layered phase, while donor substitution produced nanoscale intergrowths of n = 3 layered phase. As a result of these nanoscale intergrowths, the thermal conductivity value reduced by as much as ∼20%. Pure La2Ti2O7 has a thermal conductivity value of ∼1.3 W/m K which dropped to a value of ∼1.12 W/m K for Sr doped La2Ti2O7 and ∼0.93 W/m K for Ta doped La2Ti2O7 at 573 K.

Ferroelectric and dielectric properties of Nd2−xCexTi2O7 ceramics

Abstract The solid solution system Nd2−xCexTi2O7 has been investigated. The solubility limit of Ce in Nd2−xCexTi2O7 was found to be 0·5–0·75 according to X-ray diffraction and X-ray photoelectron spectroscopy results. Ce substitution increases the b and c axes and the volume of the unit cell due to its larger ionic radius. Nd2−xCexTi2O7 (x = 0·05, 0·25, 0·5, 0·75) textured ceramics were fabricated using spark plasma sintering. The ferroelectric and dielectric properties of the ceramics were studied. Ce substitution decreases the Curie point Tc of Nd2−xCexTi2O7 compounds. The results suggest that the Tc of Ce2Ti2O7 is <1445°C.