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Dive into the research topics where Barry M. Miles is active.

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Featured researches published by Barry M. Miles.


intersociety conference on thermal and thermomechanical phenomena in electronic systems | 1996

Moisture absorption and desorption predictions for plastic ball grid array packages

Jesse E. Galloway; Barry M. Miles

Plastic electronic packages are known to absorb moisture when exposed to humid ambient conditions during storage in tape and reel in the factory. Reliability becomes a concern when packages are exposed to a humid environment for a prolonged time and then processed through a reflow oven. Thermo-mechanical and moisture induced interfacial stresses generated between the die attach and die may lead to die delamination and package cracking. Current package level moisture evaluation methods are based on experimental weight gain measurements and visual inspection after reflow for cracking or delamination. This study presents a finite element analysis (FEA) simulation of the moisture weight gain or loss in plastic ball grid array (PBGA) packages as a function of time including the effects of package geometry and material selection. Experimental weight gain and bakeout data for a 68 I/O PBGA package are shown to closely match FEA model predictions. Diffusivity and solubility property data for common packaging materials are given as a function of temperature ranging from 23/spl deg/C to 150/spl deg/C. Solder pot dip tests performed at 230/spl deg/C indicate that popcorn failures result when the moisture concentration in the die attach region exceeds 0.0048 g/cm/sup 3/ for the specific package tested.


electronic components and technology conference | 1996

Reliability characterization of the SLICC package

Pradeep Lall; Glenn E. Gold; Barry M. Miles; Kingshuk Banerji; Patrick Thompson; Corey Koehler; Indira Adhihetty

SLICC (Slightly Larger than IC Carrier) is a chip-scale ball grid array (BGA) package currently under development at Motorola. The SLICC package consists of a solder-bumped integrated circuit (IC) which is flip-chip bonded to an interposer substrate-approximately 8 mils thick-and then underfilled with an encapsulant. Chip I/Os are routed to package I/Os through plated through holes (PTHs) in the interposer substrate. Package I/Os are composed of solder bumps (approx. 22.2 mils in diameter on a 32-mil pitch) attached to the bottom side of the interposer substrate. The most apparent benefit of the SLICC package is its utilization of the area efficiency associated with direct chip attach (DCA) technology, coupled with the assembly, test, and repair simplicity afforded by BGA-type packaging.


Archive | 1995

Low profile exposed die chip carrier package

Barry M. Miles; Glenn E. Gold


Archive | 1991

Transfer molded semiconductor device package with integral shield

Keith D. Soldner; Frank J. Juskey; Bruce J. Freyman; Barry M. Miles


Archive | 1989

Pad grid array for receiving a solder bumped chip carrier

Frank J. Juskey; Barry M. Miles; Anthony B. Suppelsa


Archive | 1989

Fabrication of pad array carriers from a universal interconnect structure

Bruce J. Freyman; Barry M. Miles; Jill L. Flaugher


Archive | 1990

Flip-chip package for integrated circuits

Frank J. Juskey; Barry M. Miles; Marc V. Papageorge


Archive | 1992

Moisture relief for chip carrier

Bruce J. Freyman; Frank J. Juskey; Barry M. Miles


Archive | 1997

Molded plastic ball grid array package

Joseph G. Gillette; Barry M. Miles; Sivakumar Muthuswamy


Archive | 1995

Moisture enhanced ball grid array package

Barry M. Miles; William B. Mullen; Glenn E. Gold

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