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Bechara Fouad Boury

IBM

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Archive | 1993

Arbitration logic for multiple bus computer system

Nader Amini; Patrick Maurice Bland; Bechara Fouad Boury; Richard Gerard Hofmann; Terence Joseph Lohman

Archive | 1994

System direct memory access (DMA) support logic for PCI based computer system

Nader Amini; Patrick Maurice Bland; Bechara Fouad Boury; Richard Gerard Hofmann; Terence Joseph Lohman

Archive | 1996

Address space architecture for multiple bus computer systems

John Wiley Blackledge; Bechara Fouad Boury; Bradly G. Frey; James D. Reid; Ronald Eugene Valli

Archive | 1994

Dynamic bus sizing of DMA transfers

Nader Amini; Bechara Fouad Boury; Sherwood Brannon; Ian Anthony Concilio; Richard Gerard Hofmann; Terence Joseph Lohman

Archive | 1991

DMA controller including a FIFO register and a residual register for data buffering and having different operating modes

Nader Amini; Bechara Fouad Boury; Terence Joseph Lohman

Archive | 1992

Arbitration control logic for computer system having dual bus architecture

Nader Amini; Bechara Fouad Boury; Richard Louis Horne; Terence Joseph Lohman

Archive | 1994

Bidirectional data buffer for a bus-to-bus interface unit in a computer system

Nader Amini; Bechara Fouad Boury; Sherwood Brannon; Richard Louis Horne; Terence Joseph Lohman

Archive | 1992

Parity error detection and recovery

Nader Amini; Bechara Fouad Boury; Sherwood Brannon; Richard Louis Horne

Archive | 1994

System having a bus interface unit for overriding a normal arbitration scheme after a system resource device has already gained control of a bus

Nader Amini; Bechara Fouad Boury; Sherwood Brannon; Richard Louis Horne; Terence Joseph Lohman

Archive | 1991

Error detection and recovery in a DMA controller

Nader Amini; Bechara Fouad Boury; Sherwood Brannon; Richard Gerard Hofmann; Terence Joseph Lohman

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