Benoit Lambert

Analysis of current collapse effect in AlGaN/GaN HEMT: Experiments and numerical simulations

In this work, current collapse effects in AlGaN/GaN HEMTs are investigated by means of measurements and two-dimensional physical simulations. According to pulsed measurements, the used devices exhibit a significant gate-lag and a less pronounced drain-lag ascribed to the presence of surface/barrier and buffer traps, respectively. As a matter of fact, two trap levels (0.45 eV and 0.78 eV) were extracted by trapping analysis based on isothermal current transient. On the other hand, 2D physical simulations suggest that the kink effect can be explained by electron trapping into barrier traps and a consequent electron emission after a certain electric-field is reached.

Industrial GaN FET technology

GaN technology has gained a lot of attention in Europe over the last few years for various domains including RF electronics. After a few years of active observation, United Monolithic Semiconductors (UMS) has taken the decision to introduce a GaN technology family in its portfolio. Based on its extensive experience of III–V technology and the intensive support and collaboration with partners and European research institutes, UMS has developed the capability to produce state-of-the-art GaN devices and circuits. The present paper will summarize the current status achieved and illustrate it with a few representative examples. Aspects covering material, devices, and circuits will be addressed.

Analysis of Schottky Gate degradation evolution in AlGaN/GaN HEMTs during HTRB stress

GaN based technologies are promising in terms of electrical performances for power and high frequencies applications and their reliability assessment remains a burning issue. Thus, a good understanding of their degradation mechanisms is required to warranty their reliability. In this paper, an electrical parasitic effect has been observed on the gate-source diode forward characteristics of a set of devices under HTRB stress carried out at 175 °C up to 4000 h. This parasitic effect has been attributed to lateral surface conduction and correlated with EL signature under diode forward biasing conditions but not under transistor pinch-off biasing conditions. Then, physical analyses have pointed out the formation and growing over time of pits and cracks at the gate edge on the drain side

Proton induced trapping effect on space compatible GaN HEMTs

Abstract In order to assess the space compatibility of GaN-HEMT technology, radiation hardness tests are an essential requirement. In this field, Gallium Nitride exhibits excellent robustness with respect to radiation and GaN-based devices are providing very promising results for most of the typical space configurations. Nevertheless, in presence of very high fluence levels, displacement damage takes place reducing the device performances from the static to the dynamic point of view. This paper shows how the combination of radiation hardness tests and the improvement of deep level analysis allows us to quantify the DC and pulsed performance decrease induced by proton irradiation on a technology designed for space applications, highlighting some signatures useful for an early detection of the displacement damage. Results provide a consistent demonstration of (i) threshold voltage positive shift and (ii) trapping effect enhancement correlated with the proton irradiation fluences.

Transient Thermoreflectance for Gate Temperature Assessment in Pulse Operated GaN-Based HEMTs

An experimental method to measure the gate metal temperature of GaN-based high electron mobility transistors is demonstrated. The technique is based on transient thermoreflectance measurements performed from the backside of the device. The thermoreflectance coefficient of the gate metal was calibrated by correlating the relative change of its optical reflectivity with the temperature change measured in the GaN layer using time-resolved Raman thermography during the device cooling transient. Simulated temperature transients were in good agreement with the experimental data. The main advantage of this new method is that it enables the direct assessment of gate metal temperature under device pulsed operation regardless of the device design.

Influence of gate leakage current on AlGaN/GaN HEMTs evidenced by low frequency noise and pulsed electrical measurements

The study of the pulsed drain current or noise characteristics in AlGaN/GaN HEMTs is the key of knowledge for designing the power amplifiers, the low noise amplifiers and the oscillators or mixers, but it is well accepted today that this study is not fully accomplished without pointing on the effect of the gate leakage current; It is obvious that the transistors leakage current may disturb its operation at high power and high frequency. Leakage currents studies are also an area of great importance in optimization of safe operating area and reliability of HEMTs. Therefore, room temperature pulsed I-V and low frequency noise measurements of gate and drain currents of AlGaN/GaN HEMTs have been investigated under different bias conditions on two devices showing identical drain current and different gate current levels. The results show a correlation between two non-destructive measurement techniques applied on devices under test.

Evidence of relationship between mechanical stress and leakage current in AlGaN/GaN transistor after storage test

In this paper, leakage current signatures in AlGaN HEMT are studied after storage at 300 °C. Electrical characterization of the gate to source diode as a function of the temperature has been performed on HEMT with two different gate pad topologies, but it has not allowed identifying significant difference in the electron transport mechanisms. In forward and low reverse bias, the preeminent conduction mechanism can be attributed to thermionic field emission (TFE). By localized FIB cuts, Optical Beam Induced Resistance Change (OBIRCh) analysis was used to localize current path. Results tend to indicate that mechanical stresses in the gate structure strongly influences the leakage current of the transistor. The OBIRCh analysis technique, widely used in silicon technology, appears to be a very efficient tool to localize leakage paths, in particular for HEMT topology with source terminated field plate.

Low frequency gate noise in a diode-connected MESFET: measurements and modeling

The low frequency Schottky diode noise has been investigated in GaAs power MESFETs. For those devices, gate noise spectra are generally composed of 1/f and shot noise contributions. We have observed an increase by two orders of magnitude of the noise level when MESFETs are submitted to rf life-test. The increase of the 1/f noise can be explained by a modification of the gate space charge region extension. This interpretation is sustained by a reduction of the drain current transient magnitude and the inherent active trap density. A correlation is assumed between the increase of the shot noise level after rf life-test and a micro-plasma formation. Both 1/f noise and shot noise evolution might originate in a local increase of the electric field in the vicinity of the gate in drain access region. We have demonstrated that LF gate current noise is an early indicator of damage mechanisms occurring at the gate-semiconductor and passivation-semiconductor interfaces of the devices.

New approach for an accurate Schottky Barrier Height's extraction by I-V-T measurements

This paper proposes a diagnostic tool dedicated to the analysis of the Schottky Barrier Height (SBH). The proposed method is mainly relevant for studying gate related failure mechanisms in electronic devices. In this case, the SBH of gallium nitride High Electron Mobility Transistors (HEMTs) is investigated in terms of mean SBHs value and dispersion. It is shown that according to given temperature and gate current ranges, linear relationships can be extracted between the mean SBH and the inhomogeneities that appear in forward-biased diode. These behaviors are able to highlight different kind of defects, revealing possible weaknesses of the devices.

Gate defects in AlGaN/GaN HEMTs revealed by low frequency noise measurements

From the last decade, Nitride-based High Electron Mobility Transistors (HEMTs) have demonstrated excellent electrical and noise performances to address transceivers modules. Within this paper, a discussion on the low frequency noise on the gate access (i.e. gate current spectral density SIG) in the frequency range of 1Hz-100kHz is presented. SIG spectra reveal different signatures according to the configuration of biasing of the transistor, and to the dimensions of the transistor: the noise of the Schottky diode is studied alone (under open drain configuration), and compared with SIG of the transistor biased in the saturated region (at VDs=8V). Two designs of devices are tested: research-level devices featuring single gate finger are compared with commercial devices featuring four gate fingers, where each finger is four times larger (i.e. 16 times larger gate width than research level devices). The two sets of devices followed the same fabrication process. It is found that whatever the sizing and the gate pad configuration of the devices, the LFN spectra observed on each set of transistors feature identical signatures. The leakage carriers are following the same path between the gate and source accesses. LFN can be used as an accurate tool to discriminate between conduction mechanisms of devices, and to help to understand what are the underlying mechanisms leading to the conduction of the Schottky diode (and thus to its degradation). Moreover, it is shown that the SIG measurements under transistor biasing conditions can be correlated to the gate current spectral density in diode mode: the leakage current zone can also be tracked under this biasing operating mode.