Bernd Küchler

Simultaneous source-mask optimization: a numerical combining method

A new method for simultaneous Source-Mask Optimization (SMO) is presented. In order to produce optimum imaging fidelity with respect to exposure lattitude, depth of focus (DoF) and mask error enhancement factor (MEEF) the presented method aims to leverage both, the available degrees of freedom of a pixelated source and those available for the mask layout. The approach described in this paper is designed as to work with dissected mask polygons. The dissection of the mask patterns is to be performed in advance (before SMO) with the Synopsys Proteus OPC engine, providing the available degrees of freedom for mask pattern optimization. This is similar to mask optimization done for optical proximity correction (OPC). Additionally, however, the illumination source will be simultaneously optimized. The SMO approach borrows many of the performance enhancement methods of OPC software for mask correction, but is especially designed as to simultaneously optimize a pixelated source shape as nowadays available in production environments. Designed as a numerical optimization approach the method is able to assess in acceptable times several hundreds of thousands source-mask combinations for small, critical layout snippets. This allows a global optimization scheme to be applied to the SMO problem which is expected to better explore the optimization space and thus to yield an improved solution quality compared to local optimizations methods. The method is applied to an example system for investigating the impact of source constraints on the SMO results. Also, it is investigated how well possibly conflicting goals of low MEEF and large DoF can be balanced.

Physical simulation for verification and OPC on full chip level

In this paper, we introduce a rigorous OPC technology that links the physical lithography simulation with the OPC. Firstly, the various aspects of the rigorous OPC, related to process flow, are discussed and the practical feasibility of the embedded rigorous verification is taken into account, which can make the rigorous treatment of the full-chip level possible without any additional manual efforts. We explain an embedded rigorous verification flow and the basic structure of its functionality. Finally, its practical application to real cases is discussed.

Computational Process Optimization of Array Edges

DRAM chip space is mainly determined by the size of the memory cell array patterns which consist of periodic memory cell features. Resolution Enhancement Techniques are used to optimize the periodic pattern process performance. This is often realized with aggressively coherent illumination sources supporting the periodic pattern pitch only and making an array edge correction very difficult. The edge can be the most critical pattern since it forms the transition from periodic patterns to non periodic periphery, so it combines the most critical pitch and highest susceptibility to defocus. Non functional dummy structures are very effective to support the outermost edge but are very expensive, so their reduction or avoidance directly increases chip space efficiency. This paper focuses on how to optimize the DRAM array edge automatically in contrast to manual optimization approaches that were used effectively but at high cost. We will show how to squeeze out the masks degrees of freedom to stay within tight pattern tolerances. In that way we minimize process variations and the need of costly non-functional dummy structures. To obtain the best possible results the optimization has to account for complex boundary conditions: correct resist effect prediction, mask manufacturability constraints, low dose, low MEEF, conservation of symmetries and SRAF printing, simultaneous optimization of main features and SRAFs. By incorporating these complex boundary conditions during optimization we aim to provide first time right layouts without the need for any post processing.

Source-mask optimization incorporating a physical resist model and manufacturability constraints

Lithographic process development at small k1 factors requires source-mask optimization (SMO) for obtaining sufficient process stability. Two prerequisites must be fulfilled to directly employ the SMO solutions for the optimized source and mask layouts: i) the simulation model underlying SMO should accurately predict the printing on wafer, and ii) the mask patterns must be manufacturable. With regard to i), SMO including a properly calibrated physical resist model is assumed to be more predictive across variable source and mask shapes than SMO with a computationally fast but simplifying photoresist treatment. By coupling SMO and rigorous lithography simulations, we effectively incorporate physical resist modelling into SMO. Additionally, concerning ii), we tackle the manufacturability task by incorporating mask rule constraints already during SMO. Optimizing the masks degrees of freedom in a mask-rule constrained space, we avoid any post-processing of the optimized mask clips and any corresponding degradation of the result quality. The concept of constrained optimization is also extended to placing and optimizing assist features during SMO. We employ virtual assist feature seeds that can only form real assists if mask rules are met. In that way assist features are simultaneously co-optimized together with the main features and the source.We discuss our approach at 2 examples, a line/space array edge and a SRAM cell, and point to reference1 for a rigorous cell optimization for DRAM.

Large scale model of wafer topography effects

A technique traditionally used for optical proximity correction (OPC) is extended to include topography proximity effects (TPE). Central to this is a thin-mask imaging model capable of addressing very large areas. This compact model being compatible with traditional fast imaging models used in OPC can then be used in standard correction approaches, compensating for both the optical proximity effects and wafer topography proximity effects. Model origin and model form are considered along with calibration process. Capturing ability and performance of the model are numerically evaluated on a number of test patterns. The performance of the model is close to that of models used in the planar case.

Photosensitized Chemically Amplified Resist (PSCAR) 2.0 for high-throughput and high-resolution EUV lithography: dual photosensitization of acid generation and quencher decomposition by flood exposure

A new type of Photosensitized Chemically Amplified Resist (PSCAR) **: “PSCAR 2.0,” is introduced in this paper. PSCAR 2.0 is composed of a protected polymer, a “photo acid generator which can be photosensitized” (PS-PAG), a “photo decomposable base (quencher) which can be photosensitized” (PS-PDB) and a photosensitizer precursor (PP). With this PSCAR 2.0, a photosensitizer (PS) is generated by an extreme ultra-violet (EUV) pattern exposure. Then, during a subsequent flood exposure, PS selectively photosensitizes the EUV exposed areas by the decomposition of a PS-PDB in addition to the decomposition of PS-PAG. As these pattern-exposed areas have the additional acid and reduced quencher concentration, the initial quencher loading in PSCAR 2.0 can be increased in order to get the same target critical dimensions (CD). The quencher loading is to be optimized simultaneously with a UV flood exposure dose to achieve the best lithographic performance and resolution. In this work, the PSCAR performance when different quenchers are used is examined by simulation and exposure experiments with the 16 nm half-pitch (HP) line/space (L/S, 1:1) patterns. According to our simulation results among resists with the different quencher types, the best performance was achieved by PSCAR 2.0 using PS-PDB with the highest possible chemical gradient resulting in the lowest line width roughness (LWR). PSCAR 2.0 performance has furthermore been confirmed on ASML’s NXE:3300 with TEL’s standalone pre-alpha flood exposure tool at imec. The initial PSCAR 2.0 patterning results on NXE:3300 showed the accelerated photosensitization performance with PS-PDB. From these results, we concluded that the dual sensitization of PS-PAG and PS-PDB in PSCAR 2.0 have a potential to realize a significantly improved resist performance in EUV lithography.

Role of 3D photo-resist simulation for advanced technology nodes

3D Resist Models are gaining significant interest for advanced technology node development. Correct prediction of resist profiles, resist top-loss and top-rounding are acquiring higher importance in ORC hotspot verification due to impact on etch resistance and post etch results. We would like to highlight the specific calibration procedure to calibrate a rigorous 3D model. Special focus is on the importance of high quality metrology data for both a successful calibration and for allowing a reduction of the number of data points used for calibration [1]. In a productive application the calibration could be performed using a subset of 20 features measured through dose and focus and model validation was done with 500 features through dose and focus. This data reduction minimized the actual calibration effort of the 3D resist model and enabled calibration run times of less than one hour. The successful validation with the complete data set showed that the data reduction did not cause over- fitting of the model. The model is applied and verified at hotspots showing defects such as bottom bridging or top loss that would not be visible in a 2D resist model. The model performance is also evaluated with a conventional CD error metric where CD at Bottom of simulation and measurement are compared. We could achieve excellent results for both metrics using SEM CD, SEM images, AFM measurements and wafer cross sections. Additional modeling criterion is resist model portability. A prerequisite is the separability of resist model and optical model, i.e. the resist model shall characterize the resist only and should not lump characteristics from the optical model. This is a requirement to port the resist model to different optical setups such as another illumination source without the need of re-calibration. Resist model portability is shown by validation and application of the model to a second process with significantly different optical settings. The resist model can predict hot spots and CDs for the second litho process with the same quality as for the process it was calibrated to.

Fine calibration of physical resist models: the importance of Jones pupil, laser bandwidth, mask error and CD metrology for accurate modeling at advanced lithographic nodes

In this paper, we discuss the accuracy of resist model calibration under various aspects. The study is done based on an extensive OPC dataset including hundreds of CD values obtained with immersion lithography for the sub-30 nm node. We address imaging aspects such as the role of Jones matrices, laser bandwidth and mask bias. Besides we focus on the investigation on metrology effects arising from SEM charging and uncertainty between SEM image and feature topography. For theses individual contributions we perform a series of resist model calibrations to determine their importance in terms of relative RMSE (Root Mean Square Error) and it is found that for the sub-30 nm node they all are not negligible for accurate resist model calibration.

Experimental characterization of NTD resist shrinkage

Simulation of negative tone development (NTD) resist has become a challenge for physical resist modeling. Traditionally, resist modeling was mainly limited to reaction-diffusion models for post exposure bake (PEB) and standard development rate models for simulating the pattern formation during the final development step. With some minor extensions, this simulation approach sufficiently predicted resist CDs and resist profile shapes that were in agreement with experimental data.3 For the latest NTD resists, this situation has changed. In contrast to positive tone development (PTD) resists, resist shrinkage is strongly impacting resist profile shapes. Furthermore, NTD resists induce strong proximity effects that require consideration of additional chemical resist properties in modeling and model calibration. In this paper we experimentally characterize and model the main properties of NTD photo-resists.

Modeling of NTD resist shrinkage

Recent chemically amplified resists used for Negative Tone Development (NTD) processes exhibit a significant amount of resist shrinkage during post-exposure-bake (PEB). Some NTD resists show up to 25% thickness loss during PEB in the exposed regions. A detailed analysis of this and other experimental observations is published elsewhere.1 In particular, it has also been demonstrated that the shrinkage during PEB can have a strong impact on both, the CDs and the resist profile shapes which are formed after Negative Tone Development. We therefore highlight the necessity to augment physical modeling of the PEB process step for these NTD photoresists. To account for the shrinkage process during PEB in lithography simulations we start with the following modeling assumptions: The tendency for shrinkage is due to the collapse of the void space (free volume) which is formed after evaporation of the volatile byproduct of the de-protection reaction. However, this will not only induce a (vertical) resist height loss but causes also lateral displacements inside the resist. This yields distorted concentration profiles of all the species that are typically tracked during PEB simulations. In particular, a distorted degree of protection after PEB will result in resist profiles with tilted sidewall angles and changed CDs. As will be shown these effects are strongly pitch-dependent and must be accounted for in a physical simulation approach as well as in OPC modeling. In this work, we discuss our simulation approach to account for mechanical deformations. Using exemplary simulations, we determine the impact of the main effects which are captured by the model. In order to validate the simulation model, the simulated effect of shrinkage-induced mechanical deformations during PEB on CDs and on resist profiles is compared with experimental data.