Binqiang Wang

Synthesis and characterization of K2Ti6O13 nanowires

Abstract K2Ti6O13 nanowires with an average diameter of about 10 nm were synthesized by a simple hydrothermal reaction between Na2Ti3O7 and KOH. The nanowires were characterized by TEM, XRD, and EDX, and their growth was found to result from an ion exchange induced phase transition process. UV–Vis absorption spectrum of the nanowires shows a red shift relative to that of the raw materials.

Strain-induced formation of K2Ti6O13 nanowires via ion exchange

Nanowires with 10 nm in diameter and several microns in length have been synthesized by ion exchange reaction of Na2Ti3O7 in KOH aqueous solution, and the structure of these nanowires has been determined to be K2Ti6O13. It was shown that the nanowires were formed as a result of strain induced phase transformation from the Na2Ti3O7 structure to K2Ti6O13. The length of the nanowires was determined largely by the size of the raw Na2Ti3O7 crystal along its [010] direction, and the cross section was determined mainly by the competition between the lattice misfit resulted strain energy and the bonding characteristics of the Na2Ti3O7 structure.

Load-Balanced Multipath Self-Routing Switching Structure by Concentrators

A novel two stage load-balanced multipath self-routing switch structure is introduced in this paper. Both stages use a multipath self-routing fabric. With simple algorithms and small buffers, the first stage fabric transforms the incoming traffic into uniform and the second stage fabric forwards the data in a self-routing manner to their final destinations. Compared with other similar structures, this structure outstands with no queuing delay and zero jitter, its component complexity and propagation delay are significantly reduced. Mathematical analysis and simulations show this structure can achieve 100% throughput under admissible traffic pattern, which is a common presumption for incoming traffic. For statistically admissible traffic, by stacking up a few copies of this structure, it is suitable to support QoS application for building super large scale switching fabric in next generation network(NGN).

Identifying elephant flows in internet backbone traffic with bloom filters and LRU

Traffic measurements provide critical input for network security, traffic engineering and accounting. Restrained capabilities of computing and storage have motivated recent researches on partial flow maintenance like identifying elephant flows. Considering high false negative probability of traditional algorithms, a novel scheme called BF-LRU (Bloom filters and least recent used) is presented. Our BF-LRU scheme adopts LRU replacement to evict mice flows and Bloom filters representation to conserve heavy hitters. Based on Pareto and hypergeometric distribution, expressions of upper-bound error probability are analyzed in detail. Experiments are conducted based on real Internet traffic data. Simulation results indicate that BF-LRU can not only achieve lower error probability, but also scale up to OC-768 backbone trace without losing any space efficiency.

Multi-path Self-routing Switching Structure; by Interconnection of Multistage Sorting Concentrators

Several nonblocking packet switching architectures have been proposed for broadband network, such as shared bus, shared memory, crossbar matrix with combined input and output queuing, etc. Their topological demerit, such as bandwidth bottleneck and insufficient processing ability to schedule I/O matching, greatly limits their ability for large scale switching routers. This paper proposes and models a novel multi- path self-routing switching fabric by merging the bitonic sorters with the multistage interconnection network. This structure possesses the properties of complete distributing and self-routing, free of I/O matching scheduling algorithm, no internal buffer, no buffered delay and jitter, modeled with algebraic permuting group, as well as high modularity and recursive scalability. Mathematical analysis and simulations show this structure is suitable for building super large scale switching fabric to support QoS applications.

A Forwarding Approach for Routers Supporting PIM-SM in the IPv6 Networks

Protocol independent multicast-sparse mode can use either a shared tree or a shortest path tree to deliver IPv6 multicast packets, consequently the multicast IP lookup engine requires, in some cases, two searches to get a correct forwarding decision, and this will lead to a new requirement of doubling the lookup speed. The ordinary method to satisfy this requirement in TCAM-based (ternary content addressable memory) lookup engines is to exploit parallelism among multiple TCAMs, however, parallel methods always incur more resources and higher design difficulty. We propose in this paper a approach to solve this problem. By arranging multicast forwarding table in class sequence in TCAM together with using the intrinsic characteristic of the TCAM, our approach can use just one search and a single TCAM to get the right lookup result, while keeping the hardware of lookup engine unchanged. Experimental results have shown that the approach can make it possible for just one TCAM to satisfy forwarding IPv6 multicast packets at the full link rate of 20 Gb/s with the current TCAM chip level.

Imptementing priority scheduting in a combined input-crosspoint-output queued switch

The combined input-crosspoint-queued (CICQ) crossbar switch is very appealing because it can obtain high throughput with simple scheduling mechanisms. However, in order to support multiple priority levels, separate queues per priority are required at each crosspoint, hence there needs much more memories and many priority schedulers to be implemented in a buffered crossbar, which is of great complexity. In this paper we propose a scheme that uses a hierarchical priority queuing mechanism in the input queues and a simple queue per crosspoint to effectively support multiple priorities. We present a priority weighted double round robin (PWDRR) scheduling algorithm in input scheduler to implement bandwidth allocation among multiple priorities and a simple compensation priority round robin (CPRR) scheduling policy in crosspoint scheduler to transfer cells to the output. The simulation results verify a preferable performance of our scheme.

A load balancing scheme for two-stage switches with minimum buffers for scalability

In this paper, we propose a novel load-balanced scheme-split aggregated flow (SAF) and design the buffering mechanism for two-stage self-routing switch. By grouping the signal lines with concentrators, the proposed scheme can obtain the statistical multiplex gain and reduce the complexity of computation. The mathematical analysis and simulations show that 100% throughput can be achieved for any admissible traffic pattern. Compared with other load-balancing schemes used crossbar as the basic fabric, this scheme has the distinctive advantages including the lowest complexity buffer of O(N), low queuing delay O(1), and free from the out-of-sequence problem. These properties make it practicably suitable for very large scale switching structures in Next Generation Network (NGN).

Emulating Output Queuing with Buffered Crossbar

Output queuing is well known for its ability to provide quality-of-service (QoS) guarantees. Unfortunately, the high-speed memory requirements of output queued (OQ) switch limit its use for large capacity switching architecture. A lot of work in literature has investigated how to emulate OQ switch with other switch architectures. A novel approach is constructing switches with buffered crossbars. However, most of the presented schemes still need a mild speedup which will incur significant cost for high speed network application. This paper investigates how to build a buffered crossbar switch to emulate OQ switch with no speedup. We first present a 2-dimensional buffered crossbar as a switch fabric and prove that a combined input-crosspoint-output queued (CICOQ) switch with such a fabric can emulate a restrict PIFO-OQ switch with no speedup. Then, we present a pretreatment mechanism used in scheduling input queues. With such a pretreatment mechanism, the CICOQ switch is proved to be able to emulate a general PIFO-OQ switch with no speedup. All scheduling algorithms used in proving OQ emulation are distributed, hence are practical

Obtaining High Performance Switching with Port Distributed Memories

Output queuing is well known for being able to offer high performance switching. Unfortunately, the high-speed memory requirements of OQ switch limit its use for large capacity switching architecture. Hence a practical manner for large capacity switching architecture to obtain high performance switching is to build novel switch architecture which can emulate output queued (OQ) switch. Most of the presented schemes either still need a mild speedup or need scheduling algorithms with great complexity. In this paper, we build a high performance switch architecture with port distributed memories which is denoted as PDM switch. It is proved by fluid model techniques that the PDM switch can achieve a throughput of 100% with no speedup when subjected to arbitrary distributed admissible traffic that satisfies the strong low of large numbers (SLLN). Furthermore, we prove that the PDM switch can exactly emulate an output queued (OQ) switch with no speedup, regardless of the incoming traffic pattern. Based on the PDM switch, we present a two stage priority round robin (TSPRR) algorithm. The simulation results illuminate that the PDM switch with TSPRR algorithm can obtain a preferable performance