Bishnu Prasad De

Particle Swarm Optimization with Aging Leader and Challengers for Optimal Design of Analog Active Filters

Due to the manufacturing limitations, the task of optimal analog active filter design by hand is very difficult. Evolutionary computation may be a competent implement for automatic selection of optimal discrete component values such as resistors and capacitors for analog active filter design. This paper presents an efficient approach for optimal analog filter design considering different topologies and manufacturing series by selecting their component values. The evolutionary optimization technique used is particle swarm optimization (PSO) with Aging Leader and Challenger (ALC-PSO). ALC-PSO performs the dual-task of efficiently selecting the component values as well as minimizing the total design errors of low pass active filters. The component values of the filters are selected in such a way so that they become E12/E24/E96 series compatible. The simulation results prove that ALC-PSO efficiently minimizes the total design error with respect to previously used optimization techniques.

An efficient design of CMOS comparator and folded cascode op-amp circuits using particle swarm optimization with an aging leader and challengers algorithm

AbstractDue to the compl ex growth in very large scale integration circuits, the task of optimal analog integrated circuit design by hand is very difficult. Optimization is a time consuming process having many conflicting criteria and a wide range of design parameters. Characterization of complex tradeoffs between nonlinear objectives while assuring required specifications makes analog circuit design a tedious process. The design and optimization processes have to be automated with high accuracy. Evolutionary technique may be a proficient implement for automatic design of analog integrated circuits that has been one of the most challenging topics in VLSI design process. This paper presents a competent approach for optimal designs of two analog circuits, namely, complementary metal oxide semiconductor two-stage comparator with P-type metal oxide semiconductor input driver and n-channel input, folded-cascode operational amplifier. The evolutionary technique used is particle swarm optimization (PSO) with an aging leader and challenger (ALC-PSO). The main aim is to optimize the MOS transistors’ sizes using ALC-PSO in order to reduce the areas occupied by the circuits and to get better performance parameters of the circuits. To exhibit the performance parameters of the circuits, simulation program with integrated circuit emphasis simulation has been carried out by using the optimal values of MOS transistor sizes and other design parameters. Simulation results demonstrate that design specifications are closely met and required functionalities are accommodated. The simulation results also show that the ALC-PSO is superior to the other algorithms in terms of MOS area, and performance parameters like gain, power dissipation, etc. for the examples considered.

PSO with aging leader and challengers for optimal design of high speed symmetric switching CMOS inverter

It is the general law of nature that every organism in the earth ages and has a limited lifespan. With the passage of time, the leader of the colony becomes old and feeble. This old leader no longer has the capability to lead the colony unless or otherwise it is challenged by a new and young challenger with great deal of enthusiasm. Thus, aging provides opportunities for the other individuals of the colony to challenge the leadership capability of the leader. This natural aging mechanism of the organism has been modelled into particle swarm optimization (PSO) and termed as PSO with aging leader and challenger (ALC-PSO). The main objective of this paper is to efficiently design a high speed symmetric switching CMOS inverter. Here, ALC-PSO is used for the optimal symmetric switching characterization of CMOS inverter. The optimal symmetric switching characterization of ALC-PSO is compared with those of real coded genetic algorithm (RGA), and conventional PSO reported in the recent literature. ALC-PSO based design results are also compared with the SPICE based results. Extensive simulation results justify the superior optimization capability of ALC-PSO over the afore-mentioned optimization techniques for the examples considered and can be efficiently used for optimal CMOS inverter design.

Optimal design of high speed symmetric switching CMOS inverter using hybrid harmony search with differential evolution

In this paper, a hybrid meta-heuristic search algorithm is proposed with the combination of harmony search (HS) algorithm and differential evolution (DE) algorithm, which is named as HS-DE. HS is an optimization method mimicking the music improvisation process where musicians invent their instruments’ pitches searching for a perfect state of harmony. DE is a stochastic and population-based heuristic approach having the capability to solve global optimization problems. The main idea is to hybrid together the fine tuning capability of DE with the ability of exploration in HS to get better near-global solution by utilizing both algorithms’ strengths. Here, HS-DE is used for optimal symmetric switching characterization of CMOS inverter. The performance of HS-DE is compared with conventional particle swarm optimization reported in the recent literature. HS-DE-based design results are also compared with the PSPICE results. Extensive simulation results justify superior optimization capability of HS-DE over the afore-mentioned optimization technique for the examples considered and can be efficiently used for optimal CMOS inverter design.

Design of symmetric switching CMOS inverter using PSOCFIWA

In this paper, symmetric switching characteristics of CMOS inverter are realized using an evolutionary optimization technique called Particle Swarm Optimization with Constriction Factor and Inertia Weight Approach (PSO-CFIWA). PSO-CFIWA is an improved particle swarm optimization (PSO) that proposes a new definition for the velocity vector and swarm updating and hence the solution quality is improved. The performance of PSO-CFIWA is studied with the comparison of real coded genetic algorithm (RGA), a conventional PSO reported in the literature. PSO-CFIWA based design results have been compared also to those of the PSPICE results. The comparative simulation results show that the PSO-CFIWA is superior to other aforementioned evolutionary algorithms for the employed examples and can be efficiently used for CMOS inverter design.

Design of Optimal CMOS Analog Amplifier Circuits Using a Hybrid Evolutionary Optimization Technique

This paper proposes an efficient design technique for two commonly used VLSI circuits, namely, CMOS current mirror load-based differential amplifier circuit and CMOS two-stage operational amplifier. The hybrid evolutionary method utilized for these optimal designs is random particle swarm optimization with differential evolution (RPSODE). Random PSO utilizes the weighted particles for monitoring the search directions. DE is a robust evolutionary technique. It has demonstrated an exclusive performance for the optimization problems which are continuous and global but suffers from the uncertainty issues. PSO is a robust optimization method but suffers from sub-optimality problem. This paper effectively hybridizes the random PSO and DE to remove the limitations related to both the techniques individually. In this paper, RPSODE is employed to optimize the sizes of the MOS transistors to reduce the overall area taken by the circuit while satisfying the design constraints. The results obtained from RPSODE technique are validated in SPICE environment. SPICE-based simulation results justify that RPSODE is a much better technique than other formerly reported methods for the designs of the above mentioned circuits in terms of MOS area, gain, power dissipation, etc.

Optimal Switching Characterization of High Speed CMOS Inverter Design Using Social Emotional Optimization Algorithm

Accumulative errors can be retained all the time when classical Kalman filtering is adopted for odometer-based dead reckoning, thereby affecting self-localization accuracy of the robot. A mobile robot self-localization method based on limited memory Kalman filtering (LMKF) with exponential fading factor was proposed to reduce accumulative errors of the odometer and improve localization accuracy of the mobile robot. The self-localization system of mobile robot was built. A mathematical model was established based on LMKF with exponential fading factor. A dead reckoning method fusing multi-sensor information was proposed. The model accuracy was verified through simulation and test. Results indicate that the LMKF method with exponential fading factor positively affects the tracking of high-speed maneuvering dynamic targets, and its localization error is reduced by 42.5% compared with the odometer-based dead reckoning. The tracking accuracy of the mobile robot is stable at 0.5 m. This study can provide references for mobile robot selflocalization using multi-sensor.

Evolutionary Computation Based Sizing Technique of Nulling Resistor Compensation Based CMOS Two-Stage Op-Amp Circuit

This article explores the comparative optimizing efficiency between two PSO variants, namely, Craziness based PSO (CRPSO) and PSO with an Aging Leader and Challengers (ALC-PSO) for the design of nulling resistor compensation based CMOS two-stage op-amp circuit. The concept of PSO is simple and it replicates the nature of bird flocking. As compared with Genetic algorithm (GA), PSO deals with less mathematical operators. Premature convergence and stagnation problem are the two major limitations of PSO technique. CRPSO and ALC-PSO techniques individually have eliminated the disadvantages of the PSO technique. In this article, CRPSO and ALC-PSO are individually employed to optimize the sizes of the MOS transistors to reduce the overall area taken by the circuit while satisfying the design constraints. The results obtained individually from CRPSO and ALC-PSO techniques are validated in SPICE environment. SPICE based simulation results justify that ALC-PSO is much better technique than CRPSO and other formerly ...

Design of Optimal CMOS Inverter for Symmetric Switching Characteristics Using Firefly Algorithm with Wavelet Mutation

In this article, a population based meta-heuristic search method called Firefly Algorithm with Wavelet Mutation (FAWM) is applied for the optimal switching characterization of CMOS inverter. In Firefly Algorithm (FA), behaviour of flashing firefly towards its competent mate is structured. In this algorithm attractiveness depends on brightness of light and brighter fireflies are considered as more attractive among the population. For the present minimization based optimization problem, brightness varies inversely proportional to the error fitness value, so the position of the brightest firefly gives the optimum result corresponding to the least error fitness in multidimensional search space. FAWM incorporates a new definition of swarm updating with the help of wavelet mutation based on wavelet theory. Wavelet mutation enhances the FA to explore the solution space more effectively compared with the other optimization methods. The performance of FAWM is compared with real coded genetic algorithm (RGA), and conventional PSO reported in the literature. FAWM based design results are also compared with the PSPICE results. The comparative simulation results establish the FAWM as a more competent optimization algorithm to other aforementioned evolutionary algorithms for the examples considered and can be efficiently used for CMOS inverter design.