Bj Offrein

Passive alignment of optical elements in a printed circuit board

A successful implementation of optics into PCBs (printed circuit boards) requires a precise passive alignment of optical elements relative to the optical waveguides in the board. We tackled this challenge with a novel concept that allows the passive alignment onto a PCB of any optical or optoelectronic building block with a precision of a few micrometers. Markers, structured into a copper layer during manufacturing, are used as a position reference for the polymer waveguide fabrication and for the formation of mechanical alignment features. To form the latter, laser drilling, a standard process for via formation in PCBs, is used. We were able to demonstrate repeated insertions of adapter elements into these alignment slots with a standard deviation of 3 mum for in-plane displacements. Afterwards, optical modules were mounted onto the adapters, using a standard MT interface provided by the adapter. We measured a standard deviation of the order of 5 mum for the in-plane and out-of-plane misalignments of the module with respect to the optical waveguides. The passive alignment concept demonstrated enables accurate and simple plug-in of any kind of element, in particular of optical and opto-electronic elements, into a PCB. The concept is based on established PCB manufacturing processes, which is crucial for the development towards a low-cost optical interconnect technology

Polymer waveguide-based multilayer optical connector

For the realization of a polymer waveguide based optical backplane link for computing applications, we developed a method to passively align multiple layers of polymer waveguide flex sheets in a single MT compatible ferrule. The minimal feature forming the backplane is a 192 channel link. This link is equipped with four MT connector at each end, and is performing a shuffling of the channels. We describe the passive alignment used to realize the connectors. The achieved accuracy demonstrated in a 48 channels connector consisting of 4 polymer sheets carrying 12 waveguides each, is shown to be better than ±5μm. The connection losses between a 48 channel MT fiber connector and the realized polymer waveguide connector were found to be about 2dB. Compared to fiber connectors, the presented concept using polymer waveguides has several advantages. The most relevant are that only few assembly steps are needed, it is based on a totally passive alignment scheme and it can easily be executed by standard pick and place tools.

Optical interconnects for board level applications

Optical link technology will play an increasingly important role for board-level interconnects in servers and supercomputers as a means to keep pace with the increasing intra-system bandwidth requirements. Low-cost and high density optical packaging concepts are required. We describe the development of board-level interconnects based on polymer waveguide technology. In this paper, we focus on flexible optical waveguide sheets and the passive alignment of optical connectors.

Silicon photonics packaging for highly scalable optical interconnects

Big Data and cloud-based applications drive the increasing amount of data traffic between and within data centers. Optical interconnect technology offers a larger bandwidth-distance product, interconnect density and power efficiency as copper based links. Integrated silicon photonics provides a tight integration between the optical functions with electronics on a single silicon die at the competitive cost-level of CMOS technology. All necessary silicon photonic building blocks operating at 1.3 μm and 1.55 μm have already been demonstrated. However, one of the remaining challenges is the system-level assembly, including a scalable connectorization scheme for very high optical I/O counts. To overcome this limitation, we demonstrate in this paper a silicon photonic packaging solution using polymer waveguides, which can be routed tightly to the silicon chip edge. As a first step towards this implementation, the optical coupling between a silicon photonics chip and the polymer waveguides is here discussed. The experimental results of the coupling loss and tolerance to misalignments between a silicon waveguide and a single-mode polymer waveguide processed on the chip are reported.

Towards electro-optical integration of hybrid III-V on Si lasers into the BEOL of a CMOS technology

Interconnects have become a severe bottleneck in todays computing hardware [1]. For large-scale data centers in particular, the interconnect situation is even more severe [2]. The interconnect bandwidth and bandwidth density have to be increased on all system-levels. The ideal technology to increase the density is Si photonics (SiPh). While the integration of most of the SiPh components has been mastered already on a 90 nm CMOS platform [3], the integration of III-V materials to yield directly-modulated lasers still poses a major challenge. This integration is considered as the cornerstone for reaching a complete, yet cost-competitive, SiPh-CMOS marriage. Most concepts shown so far [4, 5] either lack CMOS-compatibility or have device dimensions that hinder the integration of the laser into a standard BEOL. To allow for a common BEOL between SiPh and CMOS, we integrate the III-V material between the FEOL and BEOL, within the first interlayer dielectric ILD0 (Fig. 1). Such integration imposes tight requirements on device dimensions as well as several technological challenges that have to be mastered. We report here on decisive aspects of such integration. This represents a major step towards a full integration of III-V, SiPh and CMOS.

A mode-engineered hybrid III-V-on-silicon photodetector

We report on a novel III-V-on-silicon-photonics device architecture with an excellent modal overlap with the III-V material. Using this concept, we demonstrate hybrid photo-detectors with very low dark currents, a responsivity of up to 0.8 A/W and a low capacitance of 0.2 pF.

Compact electro-optical module with polymer waveguides on a flexible substrate for high-density board-level communication

We report on the co-packaging of electrical CMOS transceiver and VCSEL chip arrays on a flexible electrical substrate with optical polymer waveguides. The electro-optical components are attached to the substrate edge and butt-coupled to the waveguides. Electrically conductive silver-ink connects them to the substrate at an angle of 90°. The final assembly contacts the surface of a package laminate with an integrated compressible connector. The module can be folded to save space, requires only a small footprint on the package laminate and provides short electrical high-speed signal paths. With our approach, the electro-optical package becomes a compact electro-optical module with integrated polymer waveguides terminated with either optical connectors (e.g., at the card edge) or with an identical assembly for a second processor on the board. Consequently, no costly subassemblies and connectors are needed, and a very high integration density and scalability to virtually arbitrary channel counts and towards very high data rates (20+ Gbps) become possible. Future cost targets of much less than US

CMOS-embedded lasers for advanced silicon photonic devices

1 per Gbps will be reached by employing standard PCB materials and technologies that are well established in the industry. Moreover, our technology platform has both electrical and optical connectivity and functionality.

Scalable electro-photonic integration concept based on polymer waveguides

Realizing CMOS-compatible integrated lasers on silicon is a crucial step towards cost-efficient, high-functional optoelectronic integrated circuits (OEICs). Here, we report on a concept to embed active optical devices based on a bonded III–V epitaxial layer stack between the FEOL and BEOL of a CMOS silicon photonics chip. Ultra-shallow laser devices are realized with this concept and optically-pumped lasing, coupled to silicon is demonstrated for the first time with such a concept.

Compact InP-on-SOI microdisks used as high-speed modulators and photo detectors

A novel method for fabricating a single mode optical interconnection platform is presented. The method comprises the miniaturized assembly of optoelectronic single dies, the scalable fabrication of polymer single mode waveguides and the coupling to glass fiber arrays providing the I/O’s. The low cost approach for the polymer waveguide fabrication is based on the nano-imprinting of a spin-coated waveguide core layer. The assembly of VCSELs and photodiodes is performed before waveguide layers are applied. By embedding these components in deep reactive ion etched pockets in the silicon substrate, the planarity of the substrate for subsequent layer processing is guaranteed and the thermal path of chip-to-substrate is minimized. Optical coupling of the embedded devices to the nano-imprinted waveguides is performed by laser ablating 45 degree trenches which act as optical mirror for 90 degree deviation of the light from VCSEL to waveguide. Laser ablation is also implemented for removing parts of the polymer stack in order to mount a custom fabricated connector containing glass fiber arrays. A demonstration device was built to show the proof of principle of the novel fabrication, packaging and optical coupling principles as described above, combined with a set of sub-demonstrators showing the functionality of the different techniques separately. The paper represents a significant part of the electro-photonic integration accomplishments in the European 7th Framework project “Firefly” and not only discusses the development of the different assembly processes described above, but the efforts on the complete integration of all process approaches into the single device demonstrator.