Bo-In Noh

Effects of isothermal aging and temperature–humidity treatment of substrate on joint reliability of Sn–3.0Ag–0.5Cu/OSP-finished Cu CSP solder joint

Abstract This study examined the effects of isothermal aging and temperature–humidity (TH) treatment of substrate on the joint reliability of a Sn–3.0Ag–0.5Cu (wt.%)/organic solderability preservative (OSP)-finished Cu solder joint. Two types of OSP-finished chip-scale-package (CSP) substrates were used, those subjected and not subjected to the TH test. This study revealed an association between the interfacial reaction behaviors, void formation and mechanical reliability of the solder joint. Many voids were formed at the interface of the OSP-finished Cu joint subjected to the TH test. These voids were caused by the oxidation of the OSP-finished Cu substrate during the TH test. In the shear tests, the shear force of the joint with the substrate not subjected to the TH test was slightly higher than that with the TH test. The mechanical reliability of the solder joint was degraded by voids at the interface.

Comparison of Interfacial Stability of Pb-Free Solders (Sn—3.5Ag, Sn—3.5Ag—0.7Cu, and Sn—0.7Cu) on ENIG-Plated Cu During Aging

The solid-state interfacial reactions of Pb-free solders (Sn-3.5Ag, Sn-3.5Ag-0.7Cu, and Sn-0.7Cu) with electroless nickel-immersion gold (ENIG)-plated Cu substrate, and the growth of interfacial intermetallic compound (IMC) layers were investigated and compared during aging at 200°C for up to 1000 h. The Sn-3.5Ag-0.7Cu solder exhibited a higher IMC growth rate and a higher consumption rate of the Ni(P) layer than the other two Pb-free solders. The interfacial reaction of the Sn-0.7Cu/ENIG-plated Cu system during aging was the slowest among the three kinds of solder joint. The thickness of the interfacial IMCs were ranked in the order Sn-3.5Ag-0.7Cu > Sn-3.5Ag > Sn-0.7Cu. The higher melting temperature of the Sn-0.7Cu solder and the presence of Cu element within the solder suppressed the growth of the interfacial IMC layer and the consumption of the Ni(P) layer, resulting in the superior interfacial stability of the solder joint at high temperature of 200°C.

Application of Underfill for Flip-Chip Package Using Ultrasonic Bonding

In this study, the reliability of flip-chip (FC) packages with various underfills using ultrasonic bonding was evaluated in temperature and humidity (TH) tests. Fatigue cracks began at the interface between the Au bumps and glass substrate and then propagated through the interface with increasing dwell time in the TH test. The initial electrical resistance of Au bumps with lower viscosity underfill was lower than that of Au bumps with higher viscosity underfill. Entrapped underfill between the Au bumps and glass substrate or void formation between the Au bumps in FC packages was caused by high viscosity of the underfill. As the dwell time of the TH test increased, the electrical resistance of the FC packages increased. The fatigue life of an FC package with underfill that has a higher glass transition temperature (Tg) and lower coefficient of thermal expansion (CTE) value was higher than that of an FC package with underfill with lower Tg and a higher CTE value. Therefore, the properties of underfill affect the fatigue life of FC packages with underfill using ultrasonic bonding.

Electrical properties and electrochemical migration characteristics of directly printed Ag patterns with various sintering conditions

Abstract In this study, we investigated the phenomena of electrochemical migration (ECM) on a silicon (Si) substrate with directly printed Ag pattern using the screen-printing method. The microstructures and electrical characteristics of the directly printed Ag patterns under different sintering conditions were estimated. In addition, the ECM characteristics of the directly patterned Ag circuits on Si substrates were evaluated according to the sintering conditions. Clusters were formed by interparticle necking during the sintering process; the cluster size in the patterns increased as the sintering temperature and time increased. Granular Ag films, which were sintered at high temperatures and for long time periods of time, had excellent electrical characteristics as a result of the formation of interparticle necking of sufficient size. Also, the directly printed Ag patterns exposed to higher sintering temperatures and longer sintering times had higher resistances to ECM than those exposed to lower sintering temperatures and shorter sintering times.

Mechanical Reliability of Sn-Ag BGA Solder Joints With Various Electroless Ni-P and Ni-B Plating Layers

The mechanical reliability of Sn-3.5 wt.%Ag solder joints with four different electroless Ni plating layers [Ni-1B, Ni-3B, Ni-7P, and Ni-10P (in wt.%)] was investigated as a function of aging time up to 60 days at 150° C. The ultimate shear stresses for fracture were higher in the ball shear tests when using Ni-B samples than those with Ni-P metallization if the aging treatment at 150° C was shorter than 15 days, and vice versa when the aging time was higher than 45 days. In all the joints, Ni3Sn4 intermetallic compounds (IMCs) were formed at the interfaces. The thickness of the IMC layer increased with decreasing B or P content, i.e., increasing Ni content. The reaction rate between the Sn-Ag solder and Ni-P was slower than that between the Sn-Ag solder and Ni-B. In the shear test, the failure mode switched from a bulk-related failure (ductile fracture) to an interface-related failure (brittle fracture), depending on the aging time. After prolonged aging treatment, weak solder/Ni3Sn4 interfaces led to a failure mode of brittle fracture for all the solder joints, due to the formation of thick Ni3Sn4 IMCs. The failure for the Sn-Ag/Ni-B joints was more abrupt and brittle due to the formation of the thick, interfacial Ni3Sn4 IMC. The results demonstrated that the Sn-Ag/Ni-P joint was more reliable than the Sn-Ag/Ni-B joint from the viewpoints of interfacial IMC thickness and long-term mechanical reliability.

Effects of Underfill Materials and Thermal Cycling on Mechanical Reliability of Chip Scale Package

The thermomechanical reliability of chip-scale packages (CSPs) with various underfills was evaluated by measure the electrical resistance under thermal shock and four-point bending fatigue tests. The underfill containing cycloaliphatic-type epoxy resin had lower resistance than without cycloaliphatic-type epoxy resin under thermomechanical fatigue test because the cycloaliphatic-type epoxy resin was able to mechanically relax more than the other types. The lifetimes of the CSPs under thermomechanical fatigues were strongly dependent on the properties of the underfill.

Effect of Atmospheric Pressure Plasma Treatment on Transverse Ultrasonic Bonding of Gold Flip-Chip Bump on Glass Substrate

This study was focused on the effect of atmospheric pressure plasma treatment conditions on the ultrasonic bonding properties of Au flip-chip bumps on Au-finished glass substrates. The spreading test of de-ionized (DI) water was carried out on the substrate after the treatment. The plasma treatment was performed with three different gases, N2, N2 + O2, and N2 + H2, for various treatment times from 0.3 to 18 s. The surface analysis was carried out after the treatment using Auger electron spectroscopy (AES) and X-ray photoelectron spectroscopy (XPS). The treatment conditions greatly affected the spreading angle and joint strength. The addition of O2 and H2 gases to N2 gas was effective to improve the wettability of the Au-finished substrate and the bondability between the Au bump and substrate, respectively. The spreading angle rapidly decreased with increasing treatment time from 0.3 to 1 s and then decreased slightly with further increase in the treatment time, whereas the bonding strength peaked after the treatment for 0.5 to 2 s and then decreased.

Ultrasonic Bonding Technology for Flip Chip Packaging

최근 들어, 다양한 형태의 휴대형 전자기기 및 디지털 컨버전스 제품들이 출시되고 있으며, 그 종류와 수요는 해마다 급속도로 증가하고 있다. 전통적으로 기계 부 품의 집합체로 알려진 자동차를 비롯한 운송 수단에도 엔진 효율 증대, 배기가스 감소, 안정성 및 편의성 향상 을 위해서 전자 부품의 양이 증가하고 있는 추세에 있 다. 이러한 전자 부품 및 제품들의 성능을 극대화하기 위해서는 고성능 마이크로프로세서, 대용량의 저장 매체 및 다양한 수동소자들의 개발 뿐 만 아니라, 각 요소들 이 최적 상태로 상호 유기적인 구동이 가능하도록 시스 템화하는 전자 패키징 기술의 개발이 요구된다. 전자 패키징 기술은 칩이나 각종 부품 또는 제품들을 외부의 환경으로부터 보호하고, 필요한 요소들에 전원을 공급하며, 전기적 신호의 원활한 통로 역할을 하는 동시 에 핫 스팟 (hot spot)에서 발생한 열을 외부로 방출시 키는 역할을 수행한다. 하나의 전자 제품이 완성되기 위해서는 다양한 전자 패키징 기술이 요구된다. 이 중에 서, 실리콘 칩을 패키징하는 기술을 1차 레벨이라 하며, 신뢰성이 높고, 작업 속도가 빠르며, 자동화가 용이한 와이어 본딩 (wire bonding) 기술이 일반적으로 사용되 어 왔지만, 최근 기하급수적으로 증가하는 논리 소자들 의 전송 속도와 발열량을 대응하기에는 한계가 있다. 이 에 따라, 솔더 범프나 금속 범프를 사용하여 실리콘 칩 을 기판 상에 실장시키는 플립칩 (flip chip) 기술의 시 장이 점차 증가하고 있다. Prismark 조사에 의하면, 세 계 플립칩 시장 규모는 2001년 411만 웨이퍼에서 2005 년 2,460만 웨이퍼로 급격하게 증가하였다. 플립칩 기 술은 기존 와이어 본딩 기술 대비 임피던스가 1/10 이 하로 낮고, 다이 크기에 유사한 크기로 패키지 크기를 줄 일 수 있는 동시에 우수한 방열 효과를 기대할 수 있기 때문에, 하기와 같은 분야에 필수적으로 요구되는 기술이다.

Behaviour of electrochemical migration with solder alloys on printed circuit boards (PCBs)

Purpose – This study seeks to investigate the electrochemical migration (ECM) behaviour of printed circuit boards (PCBs) with Sn‐37Pb and Sn‐3.0Ag‐0.5Cu (wt.%) solders under various factors such as the distance between the electrodes and bias voltage.Design/methodology/approach – This study investigated the ECM phenomena with different surface finishes of Sn‐37Pb and Sn‐3.0Ag‐0.5Cu solders using water drop (WD) and temperature and humidity bias (THB) tests. After the WD and THB tests, the dendrite phase was identified using scanning electron microscopy (SEM) and energy dispersive spectroscopy (EDS).Findings – The ECM resistance of the conventional Sn‐37Pb alloy was lower than that of the Pb‐free Sn‐3.0Ag‐0.5Cu alloy. The dendrites grew at the cathode electrodes on the PCB and expanded to the anode electrode. The main elements in the dendrites on the Sn‐37Pb and Sn‐3.0Ag‐0.5Cu finished PCBs were tin and lead, respectively.Originality/value – This study evaluates the ECM phenomena of representative solder a...

Effect of rare earth metal Ce addition to Sn-Ag solder on interfacial reactions with Cu substrate

The effect of adding a small amount of rare earth cerium (Ce) element to low Ag containing Sn-1wt%Ag Pb-free solder on its interfacial reactions with Cu substrate was investigated. The growth of intermetallic compounds (IMCs) between three Sn-1Ag-xCe solders with different Ce contents and a Cu substrate was studied and the results were compared to those obtained for the Ce-free Sn-1Ag/Cu systems. In the solid-state reactions of the Sn-1Ag(-xCe)/Cu solder joints, the two IMC layers, Cu6Sn5 and Cu3Sn, grew as aging time increased. Compared to the Sn-1Ag/Cu joint, the growth of the Cu6Sn5 and Cu3Sn layers was depressed for the Ce-containing Sn-1Ag-xCe/Cu joint. The addition of Ce to the Sn-Ag solder reduced the growth of the interfacial Cu-Sn IMCs and prevented the IMCs from spalling from the interface. The evenly-distributed Ce elements in the solder region blocked the diffusion of Sn atoms to the interface and retarded the growth of the interfacial IMC layer.