Boris Lerner

Method, apparatus, and product for use in generating crc and other remainder based codes

Processor architectures for enhanced computational capability and low latency

COMPUTING MODULE FOR EFFICIENT FFT AND FIR HARDWARE ACCELERATOR

Methods and apparatus for image processing at pixel rate

Parallel atomic increment

Memory interconnect network architecture for vector processor

Dynamically reconfigurable pipelined pre-processor

Downsampling with partial-sum re-use

TRACKING SLOW VARYING FREQUENCY IN A NOISY ENVIRONMENT AND APPLICATIONS IN HEALTHCARE

Memory arbitration circuit and method