Bowen Zheng

Cross-Layer Codesign for Secure Cyber-Physical Systems

Security attacks may have disruptive consequences on cyber-physical systems, and lead to significant social and economic losses. Building secure cyber-physical systems is particularly challenging due to the variety of attack surfaces from the cyber and physical components, and often to limited computation and communication resources. In this paper, we propose a cross-layer design framework for resource-constrained cyber-physical systems. The framework combines control-theoretic methods at the functional layer and cybersecurity techniques at the embedded platform layer, and addresses security together with other design metrics such as control performance under resource and real-time constraints. We use the concept of interface variables to capture the interactions between control and platform layers, and quantitatively model the relation among system security, performance, and schedulability via interface variables. The general codesign framework is customized and refined to the automotive domain, and its effectiveness is demonstrated through an industrial case study and a set of synthetic examples.

Lifetime optimization for real-time embedded systems considering electromigration effects

In this article, we propose a new lifetime task optimization technique for real-time embedded processors considering the electromigration-induced reliability. The new approach is based on a recently proposed physics-based electromigration (EM) model for more accurate EM assessment of a power grid network at the chip level. We apply the dynamic voltage and frequency scaling (DVFS) (by selecting the performance states or p-states of the tasks to manage the power) and thus the lifetime of the processor running different tasks over their periods. We consider both single-rate and multi-rate embedded systems with preemption. To model the mean-time-to-failure (MTTF) of a task for a given p-state, response surface modeling is applied. We then frame the reliability optimization problem as the continuous constrained nonlinear optimization problem in which the system EM-induced reliability is maximized subject to the timing constraints, which is further solved by simulated annealing method. Experimental results show that for low utilization systems, significant reliability improvement can be achieved with even smaller power consumption than existing reliability-ignore scheduling method. The proposed method can lead to near Paretos front trade-off between the power/energy and the lifetime compared to the existing task scheduling method.

Analysis and optimization of soft error tolerance strategies for real-time systems

The safety of real-time embedded systems relies on both functional and timing correctness. On the timing side, realtime constraints are set on task executions, and missing them may lead to system failure. On the functional side, soft errors have become a major concern. Various soft error tolerance strategies are proposed for soft error detection and recovery, however they may introduce significant computation overhead and cause timing violations. In this work, we address the two aspects in an integrated framework, and propose a set of formulations to quantitatively model the impact of soft error detection and recovery mechanisms on real-time constraints. The formulations facilitate designers to analyze system feasibility under fault tolerance requirements and compare various architecture platforms. They may also help select the appropriate error tolerance mechanisms for software tasks, together with exploring task scheduling and allocation on representative single-core, multicore and distributed platforms, to maximize error coverage while meeting real-time constraints. Experiments on an industrial case study and synthetic examples demonstrate the effectiveness of our approach.

CONVINCE: a cross-layer modeling, exploration and validation framework for next-generation connected vehicles

Next-generation autonomous and semi-autonomous vehicles will not only precept the environment with their own sensors, but also communicate with other vehicles and surrounding infrastructures for vehicle safety and transportation efficiency. The design, analysis and validation of various vehicle-to-vehicle (V2V) and vehicle-to-infrastructure (V2I) applications involve multiple layers, from V2V/V2I communication networks down to software and hardware of individual vehicles, and concern with stringent requirements on multiple metrics such as timing, security, reliability and fault tolerance. To cope with these challenges, we have been developing CONVINCE, a cross-layer modeling, exploration and validation framework for connected vehicles. The framework includes mathematical models, synthesis and validation algorithms, and a heterogeneous simulator for inter-vehicle communications and intra-vehicle software and hardware in a holistic environment. It explores various design options with respect to constraints and objectives on system safety, security, reliability, cost, etc. A V2V application is used in the case study to demonstrate the effectiveness of the proposed framework.

Next Generation Automotive Architecture Modeling and Exploration for Autonomous Driving

To support emerging applications in autonomous and semi-autonomous driving, next-generation automotive systems will be equipped with an increasing number of heterogeneous components (sensors, actuators and computation units connected through various buses), and have to process a high volume of data to percept the environment accurately and efficiently. Challenges for such systems include system integration, prediction, verification and validation. In this work, we propose an architecture modeling and exploration framework for evaluating various software and hardware architecture options. The framework will facilitate system integration and optimization, and enable validation of various design metrics such as timing, reliability, security and performance.

Delay-Aware Design, Analysis and Verification of Intelligent Intersection Management

With the rapid advancement of autonomous driving and vehicular communication technology, intelligent intersection management has shown great promise in improving transportation efficiency. In a typical intelligent intersection, an intersection manager communicates with autonomous vehicles wirelessly and schedules their crossing of the intersection. Previous system designs, however, do not address the possible communication delays due to network congestion or security attacks, and could lead to unsafe or deadlocked systems. In this work, we propose a delay- tolerant protocol for intelligent intersection management, and develop a modeling, simulation and verification framework for analyzing the protocols safety, liveness and performance. Experiments demonstrate the advantages of our proposed protocol over traditional traffic light control, and more importantly, demonstrate the importance and effectiveness of using this framework to address timing (delay) in vehicular network applications. This work is the first step towards a comprehensive delay-aware design and verification framework for practical vehicular network applications.

Addressing Extensibility and Fault Tolerance in CAN-based Automotive Systems

The design of automotive electronic systems needs to address a variety of important objectives, including safety, performance, fault tolerance, reliability, security, extensibility, etc. To obtain a feasible design, timing constraints must be satisfied and latencies of certain functional paths should not exceed their deadlines. From functionality perspective, soft errors caused by transient or intermittent faults need to be detected and recovered with fault tolerance techniques. Moreover, during the lifetime of a vehicle design or even the same car, updates are often needed to add new features or fix bugs in existing ones. It is therefore critical to improve the design extensibility for accommodating such updates without incurring major redesign and re-verification cost. In this work, we discuss the metrics for measuring latency, fault tolerance and extensibility, and present a simulated annealing based algorithm to search the design space with respect to them. Experimental results on industrial and synthetic examples demonstrate clear trade-offs among these objectives, and hence the importance of quantitatively analyzing such trade-offs and exploring the design space with automation tools.