Publication


Featured researches published by Bradley Burres.


IEEE Micro | 2015

Intel Atom C2000 Processor Family: Power-Efficient Datacenter Processing

Bradley Burres; Johan van de Groenendaal; Praveen Mosur; Jonathan Robinson; Ian M. Steiner; Yi-Feng Liu; Sin S. Tan; Erik A. McShane; Belliappa Kuttanna; Sridhar Lakshmanamurthy

The Intel Atom C2000 Microserver, codenamed Avoton and Rangeley, is a complete server and embedded processor system on chip (SoC) that provides up to seven times greater performance and six times the energy efficiency versus the prior-generation processor. Leveraging the Atom Silvermont microarchitecture, Intels 22-nm tri-gate manufacturing process and a robust set of integrated I/O, Intel is expanding its reach into datacenter computing.


Archive | 2000

SDRAM controller for parallel processor architecture

William Wheeler; Bradley Burres; Matthew J. Adiletta; Gilbert Wolrich


Archive | 2009

Method and apparatus for scheduling the processing of commands for execution by cryptographic algorithm cores in a programmable network processor

Jaroslaw J. Sydir; Chen-Chi Kuo; Kamal J. Koshy; Wajdi K. Feghali; Bradley Burres; Gilbert Wolrich


Archive | 2009

Method and apparatus for performing an authentication after cipher operation in a network processor

Jaroslaw J. Sydir; Kamal J. Koshy; Wajdi K. Feghali; Bradley Burres; Gilbert Wolrich


Archive | 2003

Network processor having cryptographic processing including an authentication buffer

Jaroslaw J. Sydir; Kamal J. Koshy; Wajdi K. Feghali; Bradley Burres; Gilbert Wolrich


Archive | 2011

PRESENTATION OF DIRECT ACCESSED STORAGE UNDER A LOGICAL DRIVE MODEL

Thomas M. Slaight; Sivakumar Radhakrishnan; Mark A. Schmisseur; Pankaj Kumar; Saptarshi Mondal; Sin S. Tan; David C. Lee; Marc T. Jones; Geetani R. Edirisooriya; Bradley Burres; Brian M. Leitner; Kenneth C. Haren; Michael T. Klinglesmith; Matthew R. Wilcox; Eric J. Dahlen


Archive | 2002

Security: Adding Protection to the Network via the Network Processor

Wajdi K. Feghali; Bradley Burres; Gilbert Wolrich; Dennis P. Carrigan


Archive | 2005

Memory controller for processor having multiple multithreaded programmable units

William Wheeler; Bradley Burres; Matthew J. Adiletta; Gilbert Wolrich


Archive | 2003

Method and apparatus for aligning ciphered data

Jaroslaw J. Sydir; Kamal J. Koshy; Wajdi K. Feghali; Bradley Burres; Gilbert Wolrich


Archive | 2003

High performance security policy database cache for network processing

Alwyn Dos Remedios; Wajdi K. Feghali; Gilbert Wolrich; Bradley Burres

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